Loading arch/sparc64/kernel/head.S +6 −6 Original line number Diff line number Diff line Loading @@ -484,16 +484,16 @@ sparc64_boot_end: /* * The following skip makes sure the trap table in ttable.S is aligned * on a 32K boundary as required by the v9 specs for TBA register. * * We align to a 32K boundary, then we have the 32K kernel TSB, * then the 32K aligned trap table. */ 1: .skip 0x4000 + _start - 1b #ifdef CONFIG_SBUS /* This is just a hack to fool make depend config.h discovering strategy: As the .S files below need config.h, but make depend does not find it for them, we include config.h in head.S */ #endif .globl swapper_tsb swapper_tsb: .skip (32 * 1024) ! 0x0000000000408000 Loading arch/sparc64/kernel/vmlinux.lds.S +0 −3 Original line number Diff line number Diff line Loading @@ -43,9 +43,6 @@ SECTIONS __ex_table : { *(__ex_table) } __stop___ex_table = .; . = ALIGN(8192); swapper_tsb = .; . += 8192; . = ALIGN(8192); __init_begin = .; .init.text : { Loading arch/sparc64/mm/tsb.c +0 −8 Original line number Diff line number Diff line Loading @@ -12,14 +12,6 @@ #include <asm/pgtable.h> #include <asm/tsb.h> /* We use an 8K TSB for the whole kernel, this allows to * handle about 4MB of modules and vmalloc mappings without * incurring many hash conflicts. */ #define KERNEL_TSB_SIZE_BYTES 8192 #define KERNEL_TSB_NENTRIES \ (KERNEL_TSB_SIZE_BYTES / sizeof(struct tsb)) extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES]; static inline unsigned long tsb_hash(unsigned long vaddr, unsigned long nentries) Loading include/asm-sparc64/tsb.h +10 −3 Original line number Diff line number Diff line Loading @@ -143,6 +143,14 @@ add REG1, (3 * 8), REG1; \ 99: /* We use a 32K TSB for the whole kernel, this allows to * handle about 16MB of modules and vmalloc mappings without * incurring many hash conflicts. */ #define KERNEL_TSB_SIZE_BYTES (32 * 1024) #define KERNEL_TSB_NENTRIES \ (KERNEL_TSB_SIZE_BYTES / 16) /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries * and the found TTE will be left in REG1. REG3 and REG4 must Loading @@ -150,12 +158,11 @@ * * VADDR and TAG will be preserved and not clobbered by this macro. */ /* XXX non-8K base page size support... */ #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ sethi %hi(swapper_tsb), REG1; \ or REG1, %lo(swapper_tsb), REG1; \ srlx VADDR, 13, REG2; \ and REG2, (512 - 1), REG2; \ srlx VADDR, PAGE_SHIFT, REG2; \ and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \ sllx REG2, 4, REG2; \ add REG1, REG2, REG2; \ ldda [REG2] ASI_NUCLEUS_QUAD_LDD, REG3; \ Loading Loading
arch/sparc64/kernel/head.S +6 −6 Original line number Diff line number Diff line Loading @@ -484,16 +484,16 @@ sparc64_boot_end: /* * The following skip makes sure the trap table in ttable.S is aligned * on a 32K boundary as required by the v9 specs for TBA register. * * We align to a 32K boundary, then we have the 32K kernel TSB, * then the 32K aligned trap table. */ 1: .skip 0x4000 + _start - 1b #ifdef CONFIG_SBUS /* This is just a hack to fool make depend config.h discovering strategy: As the .S files below need config.h, but make depend does not find it for them, we include config.h in head.S */ #endif .globl swapper_tsb swapper_tsb: .skip (32 * 1024) ! 0x0000000000408000 Loading
arch/sparc64/kernel/vmlinux.lds.S +0 −3 Original line number Diff line number Diff line Loading @@ -43,9 +43,6 @@ SECTIONS __ex_table : { *(__ex_table) } __stop___ex_table = .; . = ALIGN(8192); swapper_tsb = .; . += 8192; . = ALIGN(8192); __init_begin = .; .init.text : { Loading
arch/sparc64/mm/tsb.c +0 −8 Original line number Diff line number Diff line Loading @@ -12,14 +12,6 @@ #include <asm/pgtable.h> #include <asm/tsb.h> /* We use an 8K TSB for the whole kernel, this allows to * handle about 4MB of modules and vmalloc mappings without * incurring many hash conflicts. */ #define KERNEL_TSB_SIZE_BYTES 8192 #define KERNEL_TSB_NENTRIES \ (KERNEL_TSB_SIZE_BYTES / sizeof(struct tsb)) extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES]; static inline unsigned long tsb_hash(unsigned long vaddr, unsigned long nentries) Loading
include/asm-sparc64/tsb.h +10 −3 Original line number Diff line number Diff line Loading @@ -143,6 +143,14 @@ add REG1, (3 * 8), REG1; \ 99: /* We use a 32K TSB for the whole kernel, this allows to * handle about 16MB of modules and vmalloc mappings without * incurring many hash conflicts. */ #define KERNEL_TSB_SIZE_BYTES (32 * 1024) #define KERNEL_TSB_NENTRIES \ (KERNEL_TSB_SIZE_BYTES / 16) /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries * and the found TTE will be left in REG1. REG3 and REG4 must Loading @@ -150,12 +158,11 @@ * * VADDR and TAG will be preserved and not clobbered by this macro. */ /* XXX non-8K base page size support... */ #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ sethi %hi(swapper_tsb), REG1; \ or REG1, %lo(swapper_tsb), REG1; \ srlx VADDR, 13, REG2; \ and REG2, (512 - 1), REG2; \ srlx VADDR, PAGE_SHIFT, REG2; \ and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \ sllx REG2, 4, REG2; \ add REG1, REG2, REG2; \ ldda [REG2] ASI_NUCLEUS_QUAD_LDD, REG3; \ Loading