Commit 4dad4f32 authored by Allen-KH Cheng's avatar Allen-KH Cheng Committed by Matthias Brugger
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arm64: dts: mediatek: mt8186: Add ADSP node 



Add ADSP node for MT8186 SoC.

Signed-off-by: default avatarAllen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230324021258.15863-5-allen-kh.cheng@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 36cfc08f

arch/arm64/boot/dts/mediatek/mt8186.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -634,6 +634,22 @@ scp: scp@10500000 { 
			interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 0>;

		};



		adsp: adsp@10680000 {

			compatible = "mediatek,mt8186-dsp";

			reg = <0 0x10680000 0 0x2000>, <0 0x10800000 0 0x100000>,

			      <0 0x1068b000 0 0x100>, <0 0x1068f000 0 0x1000>;

			reg-names = "cfg", "sram", "sec", "bus";

			clocks = <&topckgen CLK_TOP_AUDIODSP>, <&topckgen CLK_TOP_ADSP_BUS>;

			clock-names = "audiodsp", "adsp_bus";

			assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>,

					  <&topckgen CLK_TOP_ADSP_BUS>;

			assigned-clock-parents = <&clk26m>, <&topckgen CLK_TOP_MAINPLL_D2_D2>;

			mbox-names = "rx", "tx";

			mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;

			power-domains = <&spm MT8186_POWER_DOMAIN_ADSP_TOP>;

			status = "disabled";

		};



		adsp_mailbox0: mailbox@10686000 {

			compatible = "mediatek,mt8186-adsp-mbox";

			#mbox-cells = <0>;