Commit f6c3e61c authored by Allen-KH Cheng's avatar Allen-KH Cheng Committed by Matthias Brugger
Browse files

arm64: dts: mediatek: mt8186: Add MTU3 nodes 



Add MTU3 nodes for MT8186 SoC.

Signed-off-by: default avatarAllen-KH Cheng <allen-kh.cheng@mediatek.com>
Tested-by: default avatarChen-Yu Tsai <wenst@chromium.org>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230324021258.15863-2-allen-kh.cheng@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent e8c6b47f

arch/arm64/boot/dts/mediatek/mt8186.dtsi

+68 −0
Original line number Diff line number Diff line
@@ -982,6 +982,40 @@ afe: audio-controller@11210000 { 
			status = "disabled";

		};



		ssusb0: usb@11201000 {

			compatible = "mediatek,mt8186-mtu3", "mediatek,mtu3";

			reg = <0 0x11201000 0 0x2dff>, <0 0x11203e00 0 0x0100>;

			reg-names = "mac", "ippc";

			clocks = <&topckgen CLK_TOP_USB_TOP>,

				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,

				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,

				 <&infracfg_ao CLK_INFRA_AO_ICUSB>;

			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";

			interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>;

			phys = <&u2port0 PHY_TYPE_USB2>;

			power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			status = "disabled";



			usb_host0: usb@11200000 {

				compatible = "mediatek,mt8186-xhci", "mediatek,mtk-xhci";

				reg = <0 0x11200000 0 0x1000>;

				reg-names = "mac";

				clocks = <&topckgen CLK_TOP_USB_TOP>,

					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,

					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,

					 <&infracfg_ao CLK_INFRA_AO_ICUSB>,

					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>;

				clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";

				interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>;

				mediatek,syscon-wakeup = <&pericfg 0x420 2>;

				wakeup-source;

				status = "disabled";

			};

		};



		mmc0: mmc@11230000 {

			compatible = "mediatek,mt8186-mmc",

				     "mediatek,mt8183-mmc";
@@ -1013,6 +1047,40 @@ mmc1: mmc@11240000 { 
			status = "disabled";

		};



		ssusb1: usb@11281000 {

			compatible = "mediatek,mt8186-mtu3", "mediatek,mtu3";

			reg = <0 0x11281000 0 0x2dff>, <0 0x11283e00 0 0x0100>;

			reg-names = "mac", "ippc";

			clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,

				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,

				 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,

				 <&clk26m>;

			clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";

			interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0>;

			phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>;

			power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;

			status = "disabled";



			usb_host1: usb@11280000 {

				compatible = "mediatek,mt8186-xhci", "mediatek,mtk-xhci";

				reg = <0 0x11280000 0 0x1000>;

				reg-names = "mac";

				clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,

					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,

					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,

					 <&clk26m>,

					 <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>;

				clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck","xhci_ck";

				interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 0>;

				mediatek,syscon-wakeup = <&pericfg 0x424 2>;

				wakeup-source;

				status = "disabled";

			};

		};



		u3phy0: t-phy@11c80000 {

			compatible = "mediatek,mt8186-tphy",

				     "mediatek,generic-tphy-v2";