Commit 0022cec7 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

arm64: dts: apm: add missing cache properties 

As all level 2 and level 3 caches are unified, add required
cache-unified and cache-level properties to fix warnings like:

  apm-mustang.dtb: l2-cache-0: 'cache-level' is a required property
  apm-mustang.dtb: l2-cache-0: 'cache-unified' is a required property

Link: https://lore.kernel.org/r/20230421223139.115044-1-krzysztof.kozlowski@linaro.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 7c4f1f18

arch/arm64/boot/dts/apm/apm-shadowcat.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -97,15 +97,23 @@ cpu@301 { 
		};

		xgene_L2_0: l2-cache-0 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

		xgene_L2_1: l2-cache-1 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

		xgene_L2_2: l2-cache-2 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

		xgene_L2_3: l2-cache-3 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/apm/apm-storm.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -81,15 +81,23 @@ cpu@301 { 
		};

		xgene_L2_0: l2-cache-0 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

		xgene_L2_1: l2-cache-1 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

		xgene_L2_2: l2-cache-2 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

		xgene_L2_3: l2-cache-3 {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};