Commit 013cce49 authored by Martin Tsai's avatar Martin Tsai Committed by Alex Deucher
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drm/amd/display: Force delay after DP receive power up



[Why]
Some sprcified monitor scalar cannot recognize timing
change on demand. Once the link phy disable and enable
during a short period then the Sink protection mechanism
could keep the screen in blank and cannot be recoverred.

[How]
To add 100ms delay between enable link phy and link training.

Signed-off-by: default avatarMartin Tsai <martin.tsai@amd.com>
Reviewed-by: default avatarAric Cyr <Aric.Cyr@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c69553eb
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+4 −3
Original line number Diff line number Diff line
@@ -1559,9 +1559,10 @@ bool perform_link_training_with_retries(
			pipe_ctx->clock_source->id,
			link_setting);

		if (stream->sink_patches.dppowerup_delay > 0) {
			int delay_dp_power_up_in_ms = stream->sink_patches.dppowerup_delay;

		if ((link && link->dc->debug.dppowerup_delay > 0) || stream->sink_patches.dppowerup_delay > 0) {
			int delay_dp_power_up_in_ms =
				(link->dc->debug.dppowerup_delay >= stream->sink_patches.dppowerup_delay) ?
				link->dc->debug.dppowerup_delay : stream->sink_patches.dppowerup_delay;
			msleep(delay_dp_power_up_in_ms);
		}

+1 −0
Original line number Diff line number Diff line
@@ -498,6 +498,7 @@ struct dc_debug_options {
	bool usbc_combo_phy_reset_wa;
	bool disable_dsc;
	bool enable_dram_clock_change_one_display_vactive;
	unsigned int dppowerup_delay;
};

struct dc_debug_data {