Commit 01d71368 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC updates from Arnd Bergmann:
 "Almost all SoC code changes this time are for the TI OMAP platform,
  which continues its decade-long quest to move from describing a
  complex SoC in code to device tree.

  Aside from this, the Uniphier platform has a new maintainer and some
  platforms have minor bugfixes and cleanups that were not urgent enough
  for v5.12"

* tag 'arm-soc-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  MAINTAINERS: Update ARM/UniPhier SoCs maintainers and status
  mailmap: Update email address for Nicolas Saenz
  MAINTAINERS: Update BCM2711/BCM2335 maintainer's mail
  ARM: exynos: correct kernel doc in platsmp
  ARM: hisi: use the correct HiSilicon copyright
  ARM: ux500: make ux500_cpu_die static
  ARM: s3c: Use pwm_get() in favour of pwm_request() in RX1950
  ARM: OMAP1: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: fix incorrect kernel-doc comment syntax in file
  ARM: OMAP2+: Use DEFINE_SPINLOCK() for spinlock
  ARM: at91: pm: Move prototypes to mutually included header
  ARM: OMAP2+: use true and false for bool variable
  ARM: OMAP2+: add missing call to of_node_put()
  ARM: OMAP2+: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
  ARM: imx: Kconfig: Fix typo in help
  ARM: mach-imx: Fix a spelling in the file pm-imx5.c
  bus: ti-sysc: Warn about old dtb for dra7 and omap4/5
  ARM: OMAP2+: Stop building legacy code for dra7 and omap4/5
  ARM: OMAP2+: Drop legacy platform data for omap5 hwmod
  ARM: OMAP2+: Drop legacy platform data for omap5 l3
  ...
parents ef124412 d92e5e32
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+2 −0
Original line number Diff line number Diff line
@@ -265,6 +265,8 @@ Nicholas Piggin <npiggin@gmail.com> <piggin@cyberone.com.au>
Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com>
Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>
Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de>
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.com>
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com>
+16 −14
Original line number Diff line number Diff line
@@ -2395,7 +2395,7 @@ F: sound/soc/rockchip/
N:	rockchip
ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L:	linux-samsung-soc@vger.kernel.org
S:	Maintained
@@ -2651,8 +2651,10 @@ F: drivers/watchdog/visconti_wdt.c
N:	visconti
ARM/UNIPHIER ARCHITECTURE
M:	Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
M:	Masami Hiramatsu <mhiramat@kernel.org>
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S:	Orphan
S:	Maintained
F:	Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
F:	Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml
F:	Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml
@@ -3389,7 +3391,7 @@ F: include/linux/dsa/brcm.h
F:	include/linux/platform_data/b53.h
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
M:	Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
M:	Nicolas Saenz Julienne <nsaenz@kernel.org>
L:	bcm-kernel-feedback-list@broadcom.com
L:	linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers)
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -10933,7 +10935,7 @@ F: drivers/regulator/max77802-regulator.c
F:	include/dt-bindings/*/*max77802.h
MAXIM MUIC CHARGER DRIVERS FOR EXYNOS BASED BOARDS
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
L:	linux-pm@vger.kernel.org
S:	Supported
@@ -10942,7 +10944,7 @@ F: drivers/power/supply/max77693_charger.c
MAXIM PMIC AND MUIC DRIVERS FOR EXYNOS BASED BOARDS
M:	Chanwoo Choi <cw00.choi@samsung.com>
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
L:	linux-kernel@vger.kernel.org
S:	Supported
@@ -11593,7 +11595,7 @@ F: include/linux/memblock.h
F:	mm/memblock.c
MEMORY CONTROLLER DRIVERS
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
L:	linux-kernel@vger.kernel.org
S:	Maintained
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git
@@ -12940,7 +12942,7 @@ F: Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml
F:	drivers/regulator/pf8x00-regulator.c
NXP PTN5150A CC LOGIC AND EXTCON DRIVER
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
L:	linux-kernel@vger.kernel.org
S:	Maintained
F:	Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml
@@ -14231,7 +14233,7 @@ F: drivers/pinctrl/renesas/
PIN CONTROLLER - SAMSUNG
M:	Tomasz Figa <tomasz.figa@gmail.com>
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Sylwester Nawrocki <s.nawrocki@samsung.com>
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L:	linux-samsung-soc@vger.kernel.org
@@ -15792,7 +15794,7 @@ F: Documentation/admin-guide/LSM/SafeSetID.rst
F:	security/safesetid/
SAMSUNG AUDIO (ASoC) DRIVERS
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Sylwester Nawrocki <s.nawrocki@samsung.com>
L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
S:	Supported
@@ -15800,7 +15802,7 @@ F: Documentation/devicetree/bindings/sound/samsung*
F:	sound/soc/samsung/
SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
L:	linux-crypto@vger.kernel.org
L:	linux-samsung-soc@vger.kernel.org
S:	Maintained
@@ -15835,7 +15837,7 @@ S: Maintained
F:	drivers/platform/x86/samsung-laptop.c
SAMSUNG MULTIFUNCTION PMIC DEVICE DRIVERS
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
L:	linux-kernel@vger.kernel.org
L:	linux-samsung-soc@vger.kernel.org
@@ -15860,7 +15862,7 @@ F: drivers/media/platform/s3c-camif/
F:	include/media/drv-intf/s3c_camif.h
SAMSUNG S3FWRN5 NFC DRIVER
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Krzysztof Opasiak <k.opasiak@samsung.com>
L:	linux-nfc@lists.01.org (moderated for non-subscribers)
S:	Maintained
@@ -15880,7 +15882,7 @@ S: Supported
F:	drivers/media/i2c/s5k5baf.c
SAMSUNG S5P Security SubSystem (SSS) DRIVER
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Vladimir Zapolskiy <vz@mleia.com>
L:	linux-crypto@vger.kernel.org
L:	linux-samsung-soc@vger.kernel.org
@@ -15912,7 +15914,7 @@ F: include/linux/clk/samsung.h
F:	include/linux/platform_data/clk-s3c2410.h
SAMSUNG SPI DRIVERS
M:	Krzysztof Kozlowski <krzk@kernel.org>
M:	Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
M:	Andi Shyti <andi@etezian.org>
L:	linux-spi@vger.kernel.org
L:	linux-samsung-soc@vger.kernel.org
+56 −19
Original line number Diff line number Diff line
&l4_cfg {						/* 0x4a000000 */
	compatible = "ti,dra7-l4-cfg", "simple-bus";
	compatible = "ti,dra7-l4-cfg", "simple-pm-bus";
	power-domains = <&prm_coreaon>;
	clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x4a000000 0x800>,
	      <0x4a000800 0x800>,
	      <0x4a001000 0x1000>;
@@ -11,7 +14,7 @@ &l4_cfg { /* 0x4a000000 */
		 <0x00200000 0x4a200000 0x100000>;	/* segment 2 */

	segment@0 {					/* 0x4a000000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -493,7 +496,7 @@ hwspinlock: spinlock@0 {
	};

	segment@100000 {					/* 0x4a100000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00002000 0x00102000 0x001000>,	/* ap 27 */
@@ -572,11 +575,33 @@ target-module@8000 { /* 0x4a108000, ap 29 1e.0 */
		};

		target-module@40000 {			/* 0x4a140000, ap 31 06.0 */
			compatible = "ti,sysc";
			status = "disabled";
			#address-cells = <1>;
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x400fc 4>,
			      <0x41100 4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			power-domains = <&prm_l3init>;
			clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 0>;
			clock-names = "fck";
			#size-cells = <1>;
			#address-cells = <1>;
			ranges = <0x0 0x40000 0x10000>;

			sata: sata@0 {
				compatible = "snps,dwc-ahci";
				reg = <0 0x1100>, <0x1100 0x8>;
				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
				phys = <&sata_phy>;
				phy-names = "sata-phy";
				clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
				ports-implemented = <0x1>;
			};
		};

		target-module@51000 {			/* 0x4a151000, ap 33 50.0 */
@@ -789,7 +814,7 @@ target-module@87000 { /* 0x4a187000, ap 75 74.0 */
	};

	segment@200000 {					/* 0x4a200000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00018000 0x00218000 0x001000>,	/* ap 43 */
@@ -1006,7 +1031,10 @@ target-module@36000 { /* 0x4a236000, ap 119 62.0 */
};

&l4_per1 {						/* 0x48000000 */
	compatible = "ti,dra7-l4-per1", "simple-bus";
	compatible = "ti,dra7-l4-per1", "simple-pm-bus";
	power-domains = <&prm_l4per>;
	clocks = <&l4per_clkctrl DRA7_L4PER_L4_PER1_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x48000000 0x800>,
	      <0x48000800 0x800>,
	      <0x48001000 0x400>,
@@ -1020,7 +1048,7 @@ &l4_per1 { /* 0x48000000 */
		 <0x00200000 0x48200000 0x200000>;	/* segment 1 */

	segment@0 {					/* 0x48000000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -2269,14 +2297,17 @@ target-module@d5000 { /* 0x480d5000, ap 73 30.0 */
	};

	segment@200000 {					/* 0x48200000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&l4_per2 {						/* 0x48400000 */
	compatible = "ti,dra7-l4-per2", "simple-bus";
	compatible = "ti,dra7-l4-per2", "simple-pm-bus";
	power-domains = <&prm_l4per>;
	clocks = <&l4per2_clkctrl DRA7_L4PER2_L4_PER2_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x48400000 0x800>,
	      <0x48400800 0x800>,
	      <0x48401000 0x400>,
@@ -2296,7 +2327,7 @@ &l4_per2 { /* 0x48400000 */
		 <0x48454000 0x48454000 0x400000>;	/* L3 data port */

	segment@0 {					/* 0x48400000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -3094,7 +3125,10 @@ cpts {
};

&l4_per3 {						/* 0x48800000 */
	compatible = "ti,dra7-l4-per3", "simple-bus";
	compatible = "ti,dra7-l4-per3", "simple-pm-bus";
	power-domains = <&prm_l4per>;
	clocks = <&l4per3_clkctrl DRA7_L4PER3_L4_PER3_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x48800000 0x800>,
	      <0x48800800 0x800>,
	      <0x48801000 0x400>,
@@ -3106,7 +3140,7 @@ &l4_per3 { /* 0x48800000 */
	ranges = <0x00000000 0x48800000 0x200000>;	/* segment 0 */

	segment@0 {					/* 0x48800000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -4205,7 +4239,10 @@ vpe: vpe@0 {
};

&l4_wkup {						/* 0x4ae00000 */
	compatible = "ti,dra7-l4-wkup", "simple-bus";
	compatible = "ti,dra7-l4-wkup", "simple-pm-bus";
	power-domains = <&prm_wkupaon>;
	clocks = <&wkupaon_clkctrl DRA7_WKUPAON_L4_WKUP_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x4ae00000 0x800>,
	      <0x4ae00800 0x800>,
	      <0x4ae01000 0x1000>;
@@ -4218,7 +4255,7 @@ &l4_wkup { /* 0x4ae00000 */
		 <0x00030000 0x4ae30000 0x010000>;	/* segment 3 */

	segment@0 {					/* 0x4ae00000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -4295,7 +4332,7 @@ scm_wkup: scm_conf@0 {
	};

	segment@10000 {					/* 0x4ae10000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00010000 0x001000>,	/* ap 5 */
@@ -4405,7 +4442,7 @@ target-module@c000 { /* 0x4ae1c000, ap 11 38.0 */
	};

	segment@20000 {					/* 0x4ae20000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00006000 0x00026000 0x001000>,	/* ap 13 */
@@ -4511,7 +4548,7 @@ target-module@f000 { /* 0x4ae2f000, ap 32 58.0 */
	};

	segment@30000 {					/* 0x4ae30000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0000c000 0x0003c000 0x002000>,	/* ap 30 */
+148 −72
Original line number Diff line number Diff line
@@ -125,18 +125,6 @@ opp_high@1500000000 {
		};
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap5-mpu";
			ti,hwmods = "mpu";
		};
	};

	/*
	 * XXX: Use a flat representation of the SOC interconnect.
	 * The real OMAP interconnect network is quite complex.
@@ -145,16 +133,22 @@ mpu {
	 * hierarchy.
	 */
	ocp: ocp {
		compatible = "ti,dra7-l3-noc", "simple-bus";
		compatible = "simple-pm-bus";
		power-domains = <&prm_core>;
		clocks = <&l3main1_clkctrl DRA7_L3MAIN1_L3_MAIN_1_CLKCTRL 0>,
			 <&l3instr_clkctrl DRA7_L3INSTR_L3_MAIN_2_CLKCTRL 0>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x0 0x0 0xc0000000>;
		dma-ranges = <0x80000000 0x0 0x80000000 0x80000000>;
		ti,hwmods = "l3_main_1", "l3_main_2";
		reg = <0x0 0x44000000 0x0 0x1000000>,
		      <0x0 0x45000000 0x0 0x1000>;

		l3-noc@44000000 {
			compatible = "ti,dra7-l3-noc";
			reg = <0x44000000 0x1000>,
			      <0x45000000 0x1000>;
			interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
					      <&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
		};

		l4_cfg: interconnect@4a000000 {
		};
@@ -162,36 +156,65 @@ l4_wkup: interconnect@4ae00000 {
		};
		l4_per1: interconnect@48000000 {
		};

		target-module@48210000 {
			compatible = "ti,sysc-omap4-simple", "ti,sysc";
			power-domains = <&prm_mpu>;
			clocks = <&mpu_clkctrl DRA7_MPU_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48210000 0x1f0000>;

			mpu {
				compatible = "ti,omap5-mpu";
			};
		};

		l4_per2: interconnect@48400000 {
		};
		l4_per3: interconnect@48800000 {
		};

		axi@0 {
			compatible = "simple-bus";
		/*
		 * Register access seems to have complex dependencies and also
		 * seems to need an enabled phy. See the TRM chapter for "Table
		 * 26-678. Main Sequence PCIe Controller Global Initialization"
		 * and also dra7xx_pcie_probe().
		 */
		axi0: target-module@51000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			power-domains = <&prm_l3init>;
			resets = <&prm_l3init 0>;
			reset-names = "rstctrl";
			clocks = <&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 0>,
				 <&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 9>,
				 <&pcie_clkctrl DRA7_PCIE_PCIE1_CLKCTRL 10>;
			clock-names = "fck", "phy-clk", "phy-clk-div";
			#size-cells = <1>;
			#address-cells = <1>;
			ranges = <0x51000000 0x51000000 0x3000
				  0x0	     0x20000000 0x10000000>;
			ranges = <0x51000000 0x51000000 0x3000>,
				 <0x20000000 0x20000000 0x10000000>;
			dma-ranges;
			/**
			 * To enable PCI endpoint mode, disable the pcie1_rc
			 * node and enable pcie1_ep mode.
			 */
			pcie1_rc: pcie@51000000 {
				reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
				reg = <0x51000000 0x2000>,
				      <0x51002000 0x14c>,
				      <0x20001000 0x2000>;
				reg-names = "rc_dbics", "ti_conf", "config";
				interrupts = <0 232 0x4>, <0 233 0x4>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				ranges = <0x81000000 0 0          0x03000 0 0x00010000
					  0x82000000 0 0x20013000 0x13000 0 0xffed000>;
				ranges = <0x81000000 0 0x00000000 0x20003000 0 0x00010000>,
					 <0x82000000 0 0x20013000 0x20013000 0 0x0ffed000>;
				bus-range = <0x00 0xff>;
				#interrupt-cells = <1>;
				num-lanes = <1>;
				linux,pci-domain = <0>;
				ti,hwmods = "pcie1";
				phys = <&pcie1_phy>;
				phy-names = "pcie-phy0";
				ti,syscon-lane-sel = <&scm_conf_pcie 0x18>;
@@ -210,13 +233,15 @@ pcie1_intc: interrupt-controller {
			};

			pcie1_ep: pcie_ep@51000000 {
				reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
				reg = <0x51000000 0x28>,
				      <0x51002000 0x14c>,
				      <0x51001000 0x28>,
				      <0x20001000 0x10000000>;
				reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
				interrupts = <0 232 0x4>;
				num-lanes = <1>;
				num-ib-windows = <4>;
				num-ob-windows = <16>;
				ti,hwmods = "pcie1";
				phys = <&pcie1_phy>;
				phy-names = "pcie-phy0";
				ti,syscon-unaligned-access = <&scm_conf1 0x14 1>;
@@ -225,28 +250,42 @@ pcie1_ep: pcie_ep@51000000 {
			};
		};

		axi@1 {
			compatible = "simple-bus";
		/*
		 * Register access seems to have complex dependencies and also
		 * seems to need an enabled phy. See the TRM chapter for "Table
		 * 26-678. Main Sequence PCIe Controller Global Initialization"
		 * and also dra7xx_pcie_probe().
		 */
		axi1: target-module@51800000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			clocks = <&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 0>,
				 <&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 9>,
				 <&pcie_clkctrl DRA7_PCIE_PCIE2_CLKCTRL 10>;
			clock-names = "fck", "phy-clk", "phy-clk-div";
			power-domains = <&prm_l3init>;
			resets = <&prm_l3init 1>;
			reset-names = "rstctrl";
			#size-cells = <1>;
			#address-cells = <1>;
			ranges = <0x51800000 0x51800000 0x3000
				  0x0	     0x30000000 0x10000000>;
			ranges = <0x51800000 0x51800000 0x3000>,
				 <0x30000000 0x30000000 0x10000000>;
			dma-ranges;
			status = "disabled";
			pcie2_rc: pcie@51800000 {
				reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
				reg = <0x51800000 0x2000>,
				      <0x51802000 0x14c>,
				      <0x30001000 0x2000>;
				reg-names = "rc_dbics", "ti_conf", "config";
				interrupts = <0 355 0x4>, <0 356 0x4>;
				#address-cells = <3>;
				#size-cells = <2>;
				device_type = "pci";
				ranges = <0x81000000 0 0          0x03000 0 0x00010000
					  0x82000000 0 0x30013000 0x13000 0 0xffed000>;
				ranges = <0x81000000 0 0x00000000 0x30003000 0 0x00010000>,
					 <0x82000000 0 0x30013000 0x30013000 0 0x0ffed000>;
				bus-range = <0x00 0xff>;
				#interrupt-cells = <1>;
				num-lanes = <1>;
				linux,pci-domain = <1>;
				ti,hwmods = "pcie2";
				phys = <&pcie2_phy>;
				phy-names = "pcie-phy0";
				interrupt-map-mask = <0 0 0 7>;
@@ -337,8 +376,15 @@ dra7_iodelay_core: padconf@4844a000 {

		target-module@43300000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x43300000 0x4>;
			reg-names = "rev";
			reg = <0x43300000 0x4>,
			      <0x43300010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			clocks = <&l3main1_clkctrl DRA7_L3MAIN1_TPCC_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
@@ -370,8 +416,15 @@ edma: dma@0 {

		target-module@43400000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x43400000 0x4>;
			reg-names = "rev";
			reg = <0x43400000 0x4>,
			      <0x43400010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			clocks = <&l3main1_clkctrl DRA7_L3MAIN1_TPTC0_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
@@ -388,8 +441,15 @@ edma_tptc0: dma@0 {

		target-module@43500000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x43500000 0x4>;
			reg-names = "rev";
			reg = <0x43500000 0x4>,
			      <0x43500010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			clocks = <&l3main1_clkctrl DRA7_L3MAIN1_TPTC1_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
@@ -404,11 +464,23 @@ edma_tptc1: dma@0 {
			};
		};

		dmm@4e000000 {
		target-module@4e000000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x4e000000 0x4>,
			      <0x4e000010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ranges = <0x0 0x4e000000 0x2000000>;
			#size-cells = <1>;
			#address-cells = <1>;

			dmm@0 {
				compatible = "ti,omap5-dmm";
			reg = <0x4e000000 0x800>;
				reg = <0 0x800>;
				interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			ti,hwmods = "dmm";
			};
		};

		ipu1: ipu@58820000 {
@@ -695,32 +767,36 @@ abb_gpu: regulator-abb-gpu {
			>;
		};

		qspi: spi@4b300000 {
		target-module@4b300000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x4b300000 0x4>,
			      <0x4b300010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4b300000 0x1000>,
				 <0x5c000000 0x5c000000 0x4000000>;

			qspi: spi@0 {
				compatible = "ti,dra7xxx-qspi";
			reg = <0x4b300000 0x100>,
				reg = <0 0x100>,
				      <0x5c000000 0x4000000>;
				reg-names = "qspi_base", "qspi_mmap";
				syscon-chipselects = <&scm_conf 0x558>;
				#address-cells = <1>;
				#size-cells = <0>;
			ti,hwmods = "qspi";
				clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25>;
				clock-names = "fck";
				num-cs = <4>;
				interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

		/* OCP2SCP3 */
		sata: sata@4a141100 {
			compatible = "snps,dwc-ahci";
			reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
			phys = <&sata_phy>;
			phy-names = "sata-phy";
			clocks = <&l3init_clkctrl DRA7_L3INIT_SATA_CLKCTRL 8>;
			ti,hwmods = "sata";
			ports-implemented = <0x1>;
		};

		/* OCP2SCP1 */
+24 −19
Original line number Diff line number Diff line
// SPDX-License-Identifier: GPL-2.0
&l4_cfg {						/* 0x4a000000 */
	compatible = "ti,omap4-l4-cfg", "simple-bus";
	compatible = "ti,omap4-l4-cfg", "simple-pm-bus";
	power-domains = <&prm_core>;
	clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x4a000000 0x800>,
	      <0x4a000800 0x800>,
	      <0x4a001000 0x1000>;
@@ -16,7 +19,7 @@ &l4_cfg { /* 0x4a000000 */
		 <0x00300000 0x4a300000 0x080000>;	/* segment 6 */

	segment@0 {					/* 0x4a000000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -43,7 +46,6 @@ segment@0 { /* 0x4a000000 */

		target-module@2000 {			/* 0x4a002000, ap 3 06.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "ctrl_module_core";
			reg = <0x2000 0x4>,
			      <0x2010 0x4>;
			reg-names = "rev", "sysc";
@@ -347,7 +349,7 @@ mmu_dsp: mmu@0 {
	};

	segment@80000 {					/* 0x4a080000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00059000 0x000d9000 0x001000>,	/* ap 13 */
@@ -639,7 +641,7 @@ hwspinlock: spinlock@0 {
	};

	segment@100000 {					/* 0x4a100000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00100000 0x001000>,	/* ap 21 */
@@ -653,7 +655,6 @@ segment@100000 { /* 0x4a100000 */

		target-module@0 {			/* 0x4a100000, ap 21 2a.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "ctrl_module_pad_core";
			reg = <0x0 0x4>,
			      <0x10 0x4>;
			reg-names = "rev", "sysc";
@@ -741,13 +742,13 @@ target-module@a000 { /* 0x4a10a000, ap 65 50.0 */
	};

	segment@180000 {					/* 0x4a180000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
	};

	segment@200000 {					/* 0x4a200000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0001e000 0x0021e000 0x001000>,	/* ap 31 */
@@ -903,13 +904,13 @@ target-module@2a000 { /* 0x4a22a000, ap 57 48.0 */
	};

	segment@280000 {					/* 0x4a280000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
	};

	l4_cfg_segment_300000: segment@300000 {			/* 0x4a300000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00300000 0x020000>,	/* ap 67 */
@@ -944,7 +945,10 @@ l4_cfg_target_0: target-module@0 { /* 0x4a300000, ap 67 14.0 */
};

&l4_wkup {						/* 0x4a300000 */
	compatible = "ti,omap4-l4-wkup", "simple-bus";
	compatible = "ti,omap4-l4-wkup", "simple-pm-bus";
	power-domains = <&prm_wkup>;
	clocks = <&l4_wkup_clkctrl OMAP4_L4_WKUP_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x4a300000 0x800>,
	      <0x4a300800 0x800>,
	      <0x4a301000 0x1000>;
@@ -956,7 +960,7 @@ &l4_wkup { /* 0x4a300000 */
		 <0x00020000 0x4a320000 0x010000>;	/* segment 2 */

	segment@0 {					/* 0x4a300000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -1041,7 +1045,6 @@ scrm_clockdomains: clockdomains {

		target-module@c000 {			/* 0x4a30c000, ap 19 2c.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "ctrl_module_wkup";
			reg = <0xc000 0x4>,
			      <0xc010 0x4>;
			reg-names = "rev", "sysc";
@@ -1062,7 +1065,7 @@ omap4_scm_wkup: scm@c000 {
	};

	segment@10000 {					/* 0x4a310000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00010000 0x001000>,	/* ap 5 */
@@ -1202,7 +1205,6 @@ keypad: keypad@0 {

		target-module@e000 {			/* 0x4a31e000, ap 21 30.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "ctrl_module_pad_wkup";
			reg = <0xe000 0x4>,
			      <0xe010 0x4>;
			reg-names = "rev", "sysc";
@@ -1231,7 +1233,7 @@ omap4_pmx_wkup: pinmux@40 {
	};

	segment@20000 {					/* 0x4a320000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00006000 0x00026000 0x001000>,	/* ap 13 */
@@ -1284,7 +1286,10 @@ target-module@6000 { /* 0x4a326000, ap 13 28.0 */
};

&l4_per {						/* 0x48000000 */
	compatible = "ti,omap4-l4-per", "simple-bus";
	compatible = "ti,omap4-l4-per", "simple-pm-bus";
	power-domains = <&prm_l4per>;
	clocks = <&l4_per_clkctrl OMAP4_L4_PER_CLKCTRL 0>;
	clock-names = "fck";
	reg = <0x48000000 0x800>,
	      <0x48000800 0x800>,
	      <0x48001000 0x400>,
@@ -1298,7 +1303,7 @@ &l4_per { /* 0x48000000 */
		 <0x00200000 0x48200000 0x200000>;	/* segment 1 */

	segment@0 {					/* 0x48000000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0x00000000 0x000800>,	/* ap 0 */
@@ -2437,7 +2442,7 @@ mmc5: mmc@0 {
	};

	segment@200000 {					/* 0x48200000 */
		compatible = "simple-bus";
		compatible = "simple-pm-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00150000 0x00350000 0x001000>,	/* ap 77 */
Loading