Commit 026bffa4 authored by Jonathan Cameron's avatar Jonathan Cameron
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iio: amplifiers: ad8366: Fix alignment for DMA safety



____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: e71d42e0 ("iio: amplifiers: New driver for AD8366 Dual-Digital Variable Gain Amplifier")
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: default avatarNuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-42-jic23@kernel.org
parent 00eb2b8a
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+2 −2
Original line number Diff line number Diff line
@@ -45,10 +45,10 @@ struct ad8366_state {
	enum ad8366_type	type;
	struct ad8366_info	*info;
	/*
	 * DMA (thus cache coherency maintenance) requires the
	 * DMA (thus cache coherency maintenance) may require the
	 * transfer buffers to live in their own cache lines.
	 */
	unsigned char		data[2] ____cacheline_aligned;
	unsigned char		data[2] __aligned(IIO_DMA_MINALIGN);
};

static struct ad8366_info ad8366_infos[] = {