Commit 031cba16 authored by Piyush Mehta's avatar Piyush Mehta Committed by Greg Kroah-Hartman
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dt-bindings: usb: snps,dwc3: Add 'snps,resume-hs-terminations' quirk 



Add a new 'snps,resume-hs-terminations' DT quirk to dwc3 core to resolved
issue of CRC failed error.

On the resume path, U3/U2 exit controller fails to send proper CRC checksum
in CRC5 field. As result Transaction Error is generated. Enabling bit 10 of
GUCTL1 will correct this problem.

When this bit is set to '1', the UTMI/ULPI opmode will be changed to
"normal" along with HS terminations and term/xcvr select signals after EOR.
This option is to support certain legacy UTMI/ULPI PHYs.

Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarPiyush Mehta <piyush.mehta@amd.com>
Link: https://lore.kernel.org/r/20220920052235.194272-2-piyush.mehta@amd.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent fc4ade55

Documentation/devicetree/bindings/usb/snps,dwc3.yaml

+7 −0
Original line number Diff line number Diff line
@@ -239,6 +239,13 @@ properties: 
      When set, run the SOF/ITP counter based on ref_clk.

    type: boolean



  snps,resume-hs-terminations:

    description:

      Fix the issue of HS terminations CRC error on resume by enabling this

      quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end

      of resume. This option is to support certain legacy ULPI PHYs.

    type: boolean



  snps,is-utmi-l1-suspend:

    description:

      True when DWC3 asserts output signal utmi_l1_suspend_n, false when