Commit 046e674b authored by Graham Sider's avatar Graham Sider Committed by Alex Deucher
Browse files

drm/amdkfd: convert misc checks to IP version checking 



Switch to IP version checking instead of asic_type on various KFD
version checks.

Signed-off-by: default avatarGraham Sider <Graham.Sider@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e4804a39

drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

+1 −1
Original line number Diff line number Diff line
@@ -1603,7 +1603,7 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, 
	}

	mutex_unlock(&p->mutex);



	if (dev->device_info->asic_family == CHIP_ALDEBARAN) {

	if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) {

		err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev,

				(struct kgd_mem *) mem, true);

		if (err) {

drivers/gpu/drm/amd/amdkfd/kfd_crat.c

+1 −1
Original line number Diff line number Diff line
@@ -1992,7 +1992,7 @@ static int kfd_fill_gpu_direct_io_link_to_cpu(int *avail_size, 
		sub_type_hdr->flags |= CRAT_IOLINK_FLAGS_BI_DIRECTIONAL;

		sub_type_hdr->io_interface_type = CRAT_IOLINK_TYPE_XGMI;

		sub_type_hdr->num_hops_xgmi = 1;

		if (kdev->adev->asic_type == CHIP_ALDEBARAN) {

		if (KFD_GC_VERSION(kdev) == IP_VERSION(9, 4, 2)) {

			sub_type_hdr->minimum_bandwidth_mbs =

					amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(

							kdev->adev, NULL, true);

drivers/gpu/drm/amd/amdkfd/kfd_device.c

+16 −18
Original line number Diff line number Diff line
@@ -848,23 +848,23 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf) 
static void kfd_cwsr_init(struct kfd_dev *kfd)

{

	if (cwsr_enable && kfd->device_info->supports_cwsr) {

		if (kfd->device_info->asic_family < CHIP_VEGA10) {

		if (KFD_GC_VERSION(kfd) < IP_VERSION(9, 0, 1)) {

			BUILD_BUG_ON(sizeof(cwsr_trap_gfx8_hex) > PAGE_SIZE);

			kfd->cwsr_isa = cwsr_trap_gfx8_hex;

			kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx8_hex);

		} else if (kfd->device_info->asic_family == CHIP_ARCTURUS) {

		} else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)) {

			BUILD_BUG_ON(sizeof(cwsr_trap_arcturus_hex) > PAGE_SIZE);

			kfd->cwsr_isa = cwsr_trap_arcturus_hex;

			kfd->cwsr_isa_size = sizeof(cwsr_trap_arcturus_hex);

		} else if (kfd->device_info->asic_family == CHIP_ALDEBARAN) {

		} else if (KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)) {

			BUILD_BUG_ON(sizeof(cwsr_trap_aldebaran_hex) > PAGE_SIZE);

			kfd->cwsr_isa = cwsr_trap_aldebaran_hex;

			kfd->cwsr_isa_size = sizeof(cwsr_trap_aldebaran_hex);

		} else if (kfd->device_info->asic_family < CHIP_NAVI10) {

		} else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 1, 1)) {

			BUILD_BUG_ON(sizeof(cwsr_trap_gfx9_hex) > PAGE_SIZE);

			kfd->cwsr_isa = cwsr_trap_gfx9_hex;

			kfd->cwsr_isa_size = sizeof(cwsr_trap_gfx9_hex);

		} else if (kfd->device_info->asic_family < CHIP_SIENNA_CICHLID) {

		} else if (KFD_GC_VERSION(kfd) < IP_VERSION(10, 3, 0)) {

			BUILD_BUG_ON(sizeof(cwsr_trap_nv1x_hex) > PAGE_SIZE);

			kfd->cwsr_isa = cwsr_trap_nv1x_hex;

			kfd->cwsr_isa_size = sizeof(cwsr_trap_nv1x_hex);
@@ -885,16 +885,15 @@ static int kfd_gws_init(struct kfd_dev *kfd) 
	if (kfd->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS)

		return 0;



	if (hws_gws_support

		|| (kfd->device_info->asic_family == CHIP_VEGA10

			&& kfd->mec2_fw_version >= 0x81b3)

		|| (kfd->device_info->asic_family >= CHIP_VEGA12

			&& kfd->device_info->asic_family <= CHIP_RAVEN

			&& kfd->mec2_fw_version >= 0x1b3)

		|| (kfd->device_info->asic_family == CHIP_ARCTURUS

			&& kfd->mec2_fw_version >= 0x30)

		|| (kfd->device_info->asic_family == CHIP_ALDEBARAN

			&& kfd->mec2_fw_version >= 0x28))

	if (hws_gws_support || (KFD_IS_SOC15(kfd) &&

		((KFD_GC_VERSION(kfd) == IP_VERSION(9, 0, 1)

			&& kfd->mec2_fw_version >= 0x81b3) ||

		(KFD_GC_VERSION(kfd) <= IP_VERSION(9, 4, 0)

			&& kfd->mec2_fw_version >= 0x1b3)  ||

		(KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 1)

			&& kfd->mec2_fw_version >= 0x30)   ||

		(KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2)

			&& kfd->mec2_fw_version >= 0x28))))

		ret = amdgpu_amdkfd_alloc_gws(kfd->adev,

				kfd->adev->gds.gws_size, &kfd->gws);
@@ -962,8 +961,7 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd, 
	 * calculate max size of runlist packet.

	 * There can be only 2 packets at once

	 */

	map_process_packet_size =

			kfd->device_info->asic_family == CHIP_ALDEBARAN ?

	map_process_packet_size = KFD_GC_VERSION(kfd) == IP_VERSION(9, 4, 2) ?

				sizeof(struct pm4_mes_map_process_aldebaran) :

				sizeof(struct pm4_mes_map_process);

	size += (KFD_MAX_NUM_OF_PROCESSES * map_process_packet_size +

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

+1 −2
Original line number Diff line number Diff line
@@ -250,8 +250,7 @@ static int allocate_vmid(struct device_queue_manager *dqm, 


	program_sh_mem_settings(dqm, qpd);



	if (dqm->dev->device_info->asic_family >= CHIP_VEGA10 &&

	    dqm->dev->cwsr_enabled)

	if (KFD_IS_SOC15(dqm->dev) && dqm->dev->cwsr_enabled)

		program_trap_handler_settings(dqm, qpd);



	/* qpd->page_table_base is set earlier when register_process()

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v9.c

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ static int update_qpd_v9(struct device_queue_manager *dqm, 
				SH_MEM_ALIGNMENT_MODE_UNALIGNED <<

					SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;



		if (dqm->dev->device_info->asic_family == CHIP_ALDEBARAN) {

		if (KFD_GC_VERSION(dqm->dev) == IP_VERSION(9, 4, 2)) {

			/* Aldebaran can safely support different XNACK modes

			 * per process

			 */