Commit 04956b72 authored by Hari Prasath's avatar Hari Prasath Committed by Nicolas Ferre
Browse files

ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek 



Enable the can0 and can1 controllers in sama7g5-ek board along with
its pin mux settings.

Signed-off-by: default avatarHari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-3-Hari.PrasathGE@microchip.com
parent f5e676c6

arch/arm/boot/dts/at91-sama7g5ek.dts

+25 −0
Original line number Diff line number Diff line
@@ -131,6 +131,18 @@ &adc { 
	status = "okay";

};



&can0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_can0_default>;

	status = "okay";

};



&can1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_can1_default>;

	status = "okay";

};



&cpu0 {

	cpu-supply = <&vddcpu>;

};
@@ -454,6 +466,19 @@ &i2s0 { 
};



&pioA {



	pinctrl_can0_default: can0_default {

		pinmux = <PIN_PD12__CANTX0>,

			 <PIN_PD13__CANRX0 >;

		bias-disable;

	};



	pinctrl_can1_default: can1_default {

		pinmux = <PIN_PD14__CANTX1>,

			 <PIN_PD15__CANRX1 >;

		bias-disable;

	};



	pinctrl_flx0_default: flx0_default {

		pinmux = <PIN_PE3__FLEXCOM0_IO0>,

			 <PIN_PE4__FLEXCOM0_IO1>,