Commit 05ffcd0d authored by Jae Hyun Yoo's avatar Jae Hyun Yoo Committed by Linus Walleij
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pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl 



FWSPIDQ2 and FWSPIDQ3 are not part of FWSPI18 interface so remove
FWQSPID group in pinctrl. These pins must be used with the FWSPI
pins that are dedicated for boot SPI interface which provides
same 3.3v logic level.

Fixes: 2eda1cde ("pinctrl: aspeed: Add AST2600 pinmux support")
Signed-off-by: default avatarJae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20220329173932.2588289-3-quic_jaehyoo@quicinc.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent f8970fdc

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

+3 −11
Original line number Diff line number Diff line
@@ -1236,18 +1236,12 @@ FUNC_GROUP_DECL(SALT8, AA12); 
FUNC_GROUP_DECL(WDTRST4, AA12);



#define AE12 196

SIG_EXPR_LIST_DECL_SEMG(AE12, FWSPIDQ2, FWQSPID, FWSPID,

			SIG_DESC_SET(SCU438, 4));

SIG_EXPR_LIST_DECL_SESG(AE12, GPIOY4, GPIOY4);

PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, FWSPIDQ2),

	  SIG_EXPR_LIST_PTR(AE12, GPIOY4));

PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, GPIOY4));



#define AF12 197

SIG_EXPR_LIST_DECL_SEMG(AF12, FWSPIDQ3, FWQSPID, FWSPID,

			SIG_DESC_SET(SCU438, 5));

SIG_EXPR_LIST_DECL_SESG(AF12, GPIOY5, GPIOY5);

PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, FWSPIDQ3),

	  SIG_EXPR_LIST_PTR(AF12, GPIOY5));

PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, GPIOY5));



#define AC12 198

SSSF_PIN_DECL(AC12, GPIOY6, FWSPIABR, SIG_DESC_SET(SCU438, 6));
@@ -1520,9 +1514,8 @@ SIG_EXPR_LIST_DECL_SEMG(Y4, EMMCDAT7, EMMCG8, EMMC, SIG_DESC_SET(SCU404, 3)); 
PIN_DECL_3(Y4, GPIO18E3, FWSPIDMISO, VBMISO, EMMCDAT7);



GROUP_DECL(FWSPID, Y1, Y2, Y3, Y4);

GROUP_DECL(FWQSPID, Y1, Y2, Y3, Y4, AE12, AF12);

GROUP_DECL(EMMCG8, AB4, AA4, AC4, AA5, Y5, AB5, AB6, AC5, Y1, Y2, Y3, Y4);

FUNC_DECL_2(FWSPID, FWSPID, FWQSPID);

FUNC_DECL_1(FWSPID, FWSPID);

FUNC_GROUP_DECL(VB, Y1, Y2, Y3, Y4);

FUNC_DECL_3(EMMC, EMMCG1, EMMCG4, EMMCG8);

/*
@@ -1918,7 +1911,6 @@ static const struct aspeed_pin_group aspeed_g6_groups[] = { 
	ASPEED_PINCTRL_GROUP(FSI2),

	ASPEED_PINCTRL_GROUP(FWSPIABR),

	ASPEED_PINCTRL_GROUP(FWSPID),

	ASPEED_PINCTRL_GROUP(FWQSPID),

	ASPEED_PINCTRL_GROUP(FWSPIWP),

	ASPEED_PINCTRL_GROUP(GPIT0),

	ASPEED_PINCTRL_GROUP(GPIT1),