Unverified Commit 06ddf8fb authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'visconti-arm-dt-for-v5.16' of...

Merge tag 'visconti-arm-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt

Visconti device tree updates for 5.16

 - Add DT support for Toshiba Visconti5 PCIe driver
 - Add 150MHz fixed clock to TMPV7708 SoC
 - Add DT support for VisROBO VRB boardi

* tag 'visconti-arm-dt-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti:
  arm64: dts: visconti: Add DTS for the VisROBO board
  dt-bindings: arm: toshiba: Add the TMPV7708 VisROBO VRB board
  arm64: dts: visconti: Add 150MHz fixed clock to TMPV7708 SoC
  arm64: dts: visconti: Add PCIe host controller support for TMPV7708 SoC

Link: https://lore.kernel.org/r/YWoH3g7vU1ZEAp+P@toshiba.co.jp


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 9b9a7ea8 518d432f
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@@ -18,6 +18,7 @@ properties:
        items:
          - enum:
              - toshiba,tmpv7708-rm-mbrc  # TMPV7708 RM main board
              - toshiba,tmpv7708-visrobo-vrb  # TMPV7708 VisROBO VRB board
          - const: toshiba,tmpv7708

additionalProperties: true
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# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-rm-mbrc.dtb
dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-visrobo-vrb.dtb
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@@ -76,3 +76,9 @@ &pwm_mux {
&pwm {
	status = "okay";
};

&pcie {
	status = "okay";
	clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;
	clock-names = "ref", "core", "aux";
};
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree File for TMPV7708 VisROBO VRB board
 *
 * (C) Copyright 2020, 2021, Toshiba Corporation.
 * (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
 */

/dts-v1/;

#include "tmpv7708-visrobo-vrc.dtsi"

/ {
	model = "Toshiba TMPV7708 VisROBO (VRB) board";
	compatible = "toshiba,tmpv7708-visrobo-vrb", "toshiba,tmpv7708";

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	/* 768MB memory */
	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x30000000>;
	};
};

&uart0 {
	status = "okay";
	clocks = <&uart_clk>;
	clock-names = "apb_pclk";
};

&uart1 {
	status = "okay";
	clocks = <&uart_clk>;
	clock-names = "apb_pclk";
};

&piether {
	status = "okay";
	phy-handle = <&phy0>;
	phy-mode = "rgmii-id";
	clocks = <&clk300mhz>, <&clk125mhz>;
	clock-names = "stmmaceth", "phy_ref_clk";

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@1 {
			device_type = "ethernet-phy";
			reg = <0x1>;
		};
	};
};
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree File for TMPV7708 VisROBO VRC SoM
 *
 * (C) Copyright 2020, 2021, Toshiba Corporation.
 * (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
 */

/dts-v1/;

#include "tmpv7708.dtsi"
#include <dt-bindings/gpio/gpio.h>

&wdt {
	status = "okay";
	clocks = <&wdt_clk>;
};

&gpio {
	status = "okay";
};

&spi0_pins {
	groups = "spi0_grp", "spi0_cs0_grp";
};

&spi0 {
	status = "okay";
	clocks = <&clk300mhz>, <&clk150mhz>;
	clock-names = "sspclk", "apb_pclk";

	mmc-slot@0 {
		compatible = "mmc-spi-slot";
		reg = <0>;
		gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
		voltage-ranges = <3200 3400>;
		spi-max-frequency = <12000000>;
	};
};

&i2c0 {
	status = "okay";
	clocks = <&clk150mhz>;
};
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