Loading arch/x86/kernel/aperture_64.c +1 −22 Original line number Diff line number Diff line Loading @@ -109,27 +109,6 @@ static u32 __init allocate_aperture(void) return (u32)__pa(p); } static int __init aperture_valid(u64 aper_base, u32 aper_size, u32 min_size) { if (!aper_base) return 0; if (aper_base + aper_size > 0x100000000UL) { printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n"); return 0; } if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n"); return 0; } if (aper_size < min_size) { printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n", aper_size>>20, min_size>>20); return 0; } return 1; } /* Find a PCI capability */ static __u32 __init find_cap(int bus, int slot, int func, int cap) Loading Loading @@ -344,7 +323,7 @@ void __init early_gart_iommu_check(void) if (gart_fix_e820 && !fix && aper_enabled) { if (!e820_all_mapped(aper_base, aper_base + aper_size, E820_RESERVED)) { /* reserved it, so we can resuse it in second kernel */ /* reserve it, so we can reuse it in second kernel */ printk(KERN_INFO "update e820 for GART\n"); add_memory_region(aper_base, aper_size, E820_RESERVED); update_e820(); Loading drivers/char/agp/amd64-agp.c +4 −18 Original line number Diff line number Diff line Loading @@ -228,24 +228,10 @@ static const struct agp_bridge_driver amd_8151_driver = { }; /* Some basic sanity checks for the aperture. */ static int __devinit aperture_valid(u64 aper, u32 size) static int __devinit agp_aperture_valid(u64 aper, u32 size) { if (aper == 0) { printk(KERN_ERR PFX "No aperture\n"); if (!aperture_valid(aper, size, 32*1024*1024)) return 0; } if ((u64)aper + size > 0x100000000ULL) { printk(KERN_ERR PFX "Aperture out of bounds\n"); return 0; } if (e820_any_mapped(aper, aper + size, E820_RAM)) { printk(KERN_ERR PFX "Aperture pointing to RAM\n"); return 0; } if (size < 32*1024*1024) { printk(KERN_ERR PFX "Aperture too small (%d MB)\n", size>>20); return 0; } /* Request the Aperture. This catches cases when someone else already put a mapping in there - happens with some very broken BIOS Loading Loading @@ -282,7 +268,7 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, nb_order = (nb_order >> 1) & 7; pci_read_config_dword(nb, AMD64_GARTAPERTUREBASE, &nb_base); nb_aper = nb_base << 25; if (aperture_valid(nb_aper, (32*1024*1024)<<nb_order)) { if (agp_aperture_valid(nb_aper, (32*1024*1024)<<nb_order)) { return 0; } Loading Loading @@ -313,7 +299,7 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, } printk(KERN_INFO PFX "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order); if (order < 0 || !aperture_valid(aper, (32*1024*1024)<<order)) if (order < 0 || !agp_aperture_valid(aper, (32*1024*1024)<<order)) return -1; pci_write_config_dword(nb, AMD64_GARTAPERTURECTL, order << 1); Loading include/asm-x86/gart.h +24 −0 Original line number Diff line number Diff line #ifndef _ASM_X8664_IOMMU_H #define _ASM_X8664_IOMMU_H 1 #include <asm/e820.h> extern void pci_iommu_shutdown(void); extern void no_iommu_init(void); extern int force_iommu, no_iommu; Loading Loading @@ -69,4 +71,26 @@ static inline void enable_gart_translation(struct pci_dev *dev, u64 addr) pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); } static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size) { if (!aper_base) return 0; if (aper_base + aper_size > 0x100000000ULL) { printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n"); return 0; } if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n"); return 0; } if (aper_size < min_size) { printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n", aper_size>>20, min_size>>20); return 0; } return 1; } #endif Loading
arch/x86/kernel/aperture_64.c +1 −22 Original line number Diff line number Diff line Loading @@ -109,27 +109,6 @@ static u32 __init allocate_aperture(void) return (u32)__pa(p); } static int __init aperture_valid(u64 aper_base, u32 aper_size, u32 min_size) { if (!aper_base) return 0; if (aper_base + aper_size > 0x100000000UL) { printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n"); return 0; } if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n"); return 0; } if (aper_size < min_size) { printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n", aper_size>>20, min_size>>20); return 0; } return 1; } /* Find a PCI capability */ static __u32 __init find_cap(int bus, int slot, int func, int cap) Loading Loading @@ -344,7 +323,7 @@ void __init early_gart_iommu_check(void) if (gart_fix_e820 && !fix && aper_enabled) { if (!e820_all_mapped(aper_base, aper_base + aper_size, E820_RESERVED)) { /* reserved it, so we can resuse it in second kernel */ /* reserve it, so we can reuse it in second kernel */ printk(KERN_INFO "update e820 for GART\n"); add_memory_region(aper_base, aper_size, E820_RESERVED); update_e820(); Loading
drivers/char/agp/amd64-agp.c +4 −18 Original line number Diff line number Diff line Loading @@ -228,24 +228,10 @@ static const struct agp_bridge_driver amd_8151_driver = { }; /* Some basic sanity checks for the aperture. */ static int __devinit aperture_valid(u64 aper, u32 size) static int __devinit agp_aperture_valid(u64 aper, u32 size) { if (aper == 0) { printk(KERN_ERR PFX "No aperture\n"); if (!aperture_valid(aper, size, 32*1024*1024)) return 0; } if ((u64)aper + size > 0x100000000ULL) { printk(KERN_ERR PFX "Aperture out of bounds\n"); return 0; } if (e820_any_mapped(aper, aper + size, E820_RAM)) { printk(KERN_ERR PFX "Aperture pointing to RAM\n"); return 0; } if (size < 32*1024*1024) { printk(KERN_ERR PFX "Aperture too small (%d MB)\n", size>>20); return 0; } /* Request the Aperture. This catches cases when someone else already put a mapping in there - happens with some very broken BIOS Loading Loading @@ -282,7 +268,7 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, nb_order = (nb_order >> 1) & 7; pci_read_config_dword(nb, AMD64_GARTAPERTUREBASE, &nb_base); nb_aper = nb_base << 25; if (aperture_valid(nb_aper, (32*1024*1024)<<nb_order)) { if (agp_aperture_valid(nb_aper, (32*1024*1024)<<nb_order)) { return 0; } Loading Loading @@ -313,7 +299,7 @@ static __devinit int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, } printk(KERN_INFO PFX "Aperture from AGP @ %Lx size %u MB\n", aper, 32 << order); if (order < 0 || !aperture_valid(aper, (32*1024*1024)<<order)) if (order < 0 || !agp_aperture_valid(aper, (32*1024*1024)<<order)) return -1; pci_write_config_dword(nb, AMD64_GARTAPERTURECTL, order << 1); Loading
include/asm-x86/gart.h +24 −0 Original line number Diff line number Diff line #ifndef _ASM_X8664_IOMMU_H #define _ASM_X8664_IOMMU_H 1 #include <asm/e820.h> extern void pci_iommu_shutdown(void); extern void no_iommu_init(void); extern int force_iommu, no_iommu; Loading Loading @@ -69,4 +71,26 @@ static inline void enable_gart_translation(struct pci_dev *dev, u64 addr) pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); } static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size) { if (!aper_base) return 0; if (aper_base + aper_size > 0x100000000ULL) { printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n"); return 0; } if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n"); return 0; } if (aper_size < min_size) { printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n", aper_size>>20, min_size>>20); return 0; } return 1; } #endif