Commit 0be484bf authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Benoit Cousson
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ARM: dts: omap3: Add McBSP entries 



Create the needed sections to be able to probe McBSP ports via DT.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarBenoit Cousson <b-cousson@ti.com>
parent 40c9e5ca

arch/arm/boot/dts/omap3.dtsi

+69 −0
Original line number Diff line number Diff line
@@ -220,5 +220,74 @@ wdt2: wdt@48314000 { 
			compatible = "ti,omap3-wdt";

			ti,hwmods = "wd_timer2";

		};



		mcbsp1: mcbsp@48074000 {

			compatible = "ti,omap3-mcbsp";

			reg = <0x48074000 0xff>;

			reg-names = "mpu";

			interrupts = <16>, /* OCP compliant interrupt */

				     <59>, /* TX interrupt */

				     <60>; /* RX interrupt */

			interrupt-names = "common", "tx", "rx";

			interrupt-parent = <&intc>;

			ti,buffer-size = <128>;

			ti,hwmods = "mcbsp1";

		};



		mcbsp2: mcbsp@49022000 {

			compatible = "ti,omap3-mcbsp";

			reg = <0x49022000 0xff>,

			      <0x49028000 0xff>;

			reg-names = "mpu", "sidetone";

			interrupts = <17>, /* OCP compliant interrupt */

				     <62>, /* TX interrupt */

				     <63>, /* RX interrupt */

				     <4>;  /* Sidetone */

			interrupt-names = "common", "tx", "rx", "sidetone";

			interrupt-parent = <&intc>;

			ti,buffer-size = <1280>;

			ti,hwmods = "mcbsp2";

		};



		mcbsp3: mcbsp@49024000 {

			compatible = "ti,omap3-mcbsp";

			reg = <0x49024000 0xff>,

			      <0x4902a000 0xff>;

			reg-names = "mpu", "sidetone";

			interrupts = <22>, /* OCP compliant interrupt */

				     <89>, /* TX interrupt */

				     <90>, /* RX interrupt */

				     <5>;  /* Sidetone */

			interrupt-names = "common", "tx", "rx", "sidetone";

			interrupt-parent = <&intc>;

			ti,buffer-size = <128>;

			ti,hwmods = "mcbsp3";

		};



		mcbsp4: mcbsp@49026000 {

			compatible = "ti,omap3-mcbsp";

			reg = <0x49026000 0xff>;

			reg-names = "mpu";

			interrupts = <23>, /* OCP compliant interrupt */

				     <54>, /* TX interrupt */

				     <55>; /* RX interrupt */

			interrupt-names = "common", "tx", "rx";

			interrupt-parent = <&intc>;

			ti,buffer-size = <128>;

			ti,hwmods = "mcbsp4";

		};



		mcbsp5: mcbsp@48096000 {

			compatible = "ti,omap3-mcbsp";

			reg = <0x48096000 0xff>;

			reg-names = "mpu";

			interrupts = <27>, /* OCP compliant interrupt */

				     <81>, /* TX interrupt */

				     <82>; /* RX interrupt */

			interrupt-names = "common", "tx", "rx";

			interrupt-parent = <&intc>;

			ti,buffer-size = <128>;

			ti,hwmods = "mcbsp5";

		};

	};

};