Commit 0dc4b328 authored by Yunfei Dong's avatar Yunfei Dong Committed by Mauro Carvalho Chehab
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media: mtk-vcodec: venc: support SCP firmware



Support the new extended firmware used by MT8183's encoder.

[acourbot: refactor, cleanup and split]
[hverkuil: fixed some checkpatch alignment warnings]

Signed-off-by: default avatarYunfei Dong <yunfei.dong@mediatek.com>
Co-developed-by: default avatarAlexandre Courbot <acourbot@chromium.org>
Signed-off-by: default avatarAlexandre Courbot <acourbot@chromium.org>
Acked-by: default avatarTiffany Lin <tiffany.lin@mediatek.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent c7244811
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+14 −0
Original line number Diff line number Diff line
@@ -300,6 +300,19 @@ struct mtk_vcodec_ctx {

};

/**
 * struct mtk_vcodec_enc_pdata - compatible data for each IC
 *
 * @uses_ext: whether the encoder uses the extended firmware messaging format
 * @has_lt_irq: whether the encoder uses the LT irq
 */
struct mtk_vcodec_enc_pdata {
	bool uses_ext;
	bool has_lt_irq;
};

#define MTK_ENC_CTX_IS_EXT(ctx) ((ctx)->dev->venc_pdata->uses_ext)

/**
 * struct mtk_vcodec_dev - driver data
 * @v4l2_dev: V4L2 device to register video devices for.
@@ -348,6 +361,7 @@ struct mtk_vcodec_dev {
	spinlock_t irqlock;
	struct mtk_vcodec_ctx *curr_ctx;
	void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
	const struct mtk_vcodec_enc_pdata *venc_pdata;

	struct mtk_vcodec_fw *fw_handler;

+36 −22
Original line number Diff line number Diff line
@@ -221,7 +221,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
	struct resource *res;
	phandle rproc_phandle;
	enum mtk_vcodec_fw_type fw_type;
	int i, j, ret;
	int ret;

	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
	if (!dev)
@@ -253,21 +253,20 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
	if (IS_ERR(dev->fw_handler))
		return PTR_ERR(dev->fw_handler);

	dev->venc_pdata = of_device_get_match_data(&pdev->dev);
	ret = mtk_vcodec_init_enc_pm(dev);
	if (ret < 0) {
		dev_err(&pdev->dev, "Failed to get mt vcodec clock source!");
		goto err_enc_pm;
	}

	for (i = VENC_SYS, j = 0; i < NUM_MAX_VCODEC_REG_BASE; i++, j++) {
		res = platform_get_resource(pdev, IORESOURCE_MEM, j);
		dev->reg_base[i] = devm_ioremap_resource(&pdev->dev, res);
		if (IS_ERR((__force void *)dev->reg_base[i])) {
			ret = PTR_ERR((__force void *)dev->reg_base[i]);
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	dev->reg_base[VENC_SYS] = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR((__force void *)dev->reg_base[VENC_SYS])) {
		ret = PTR_ERR((__force void *)dev->reg_base[VENC_SYS]);
		goto err_res;
	}
		mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[i]);
	}
	mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[VENC_SYS]);

	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (res == NULL) {
@@ -287,10 +286,21 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
		ret = -EINVAL;
		goto err_res;
	}
	disable_irq(dev->enc_irq);

	if (dev->venc_pdata->has_lt_irq) {
		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
		dev->reg_base[VENC_LT_SYS] = devm_ioremap_resource(&pdev->dev, res);
		if (IS_ERR((__force void *)dev->reg_base[VENC_LT_SYS])) {
			ret = PTR_ERR((__force void *)dev->reg_base[VENC_LT_SYS]);
			goto err_res;
		}
		mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[VENC_LT_SYS]);

		dev->enc_lt_irq = platform_get_irq(pdev, 1);
		ret = devm_request_irq(&pdev->dev,
			       dev->enc_lt_irq, mtk_vcodec_enc_lt_irq_handler,
				       dev->enc_lt_irq,
				       mtk_vcodec_enc_lt_irq_handler,
				       0, pdev->name, dev);
		if (ret) {
			dev_err(&pdev->dev,
@@ -299,9 +309,9 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
			ret = -EINVAL;
			goto err_res;
		}

	disable_irq(dev->enc_irq);
		disable_irq(dev->enc_lt_irq); /* VENC_LT */
	}

	mutex_init(&dev->enc_mutex);
	mutex_init(&dev->dev_mutex);
	spin_lock_init(&dev->irqlock);
@@ -382,8 +392,12 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
	return ret;
}

static const struct mtk_vcodec_enc_pdata mt8173_pdata = {
	.has_lt_irq = true,
};

static const struct of_device_id mtk_vcodec_enc_match[] = {
	{.compatible = "mediatek,mt8173-vcodec-enc",},
	{.compatible = "mediatek,mt8173-vcodec-enc", .data = &mt8173_pdata},
	{},
};
MODULE_DEVICE_TABLE(of, mtk_vcodec_enc_match);
+47 −6
Original line number Diff line number Diff line
@@ -24,6 +24,16 @@ static const char h264_filler_marker[] = {0x0, 0x0, 0x0, 0x1, 0xc};
#define H264_FILLER_MARKER_SIZE ARRAY_SIZE(h264_filler_marker)
#define VENC_PIC_BITSTREAM_BYTE_CNT 0x0098

/*
 * enum venc_h264_frame_type - h264 encoder output bitstream frame type
 */
enum venc_h264_frame_type {
	VENC_H264_IDR_FRM,
	VENC_H264_I_FRM,
	VENC_H264_P_FRM,
	VENC_H264_B_FRM,
};

/*
 * enum venc_h264_vpu_work_buf - h264 encoder buffer index
 */
@@ -138,6 +148,7 @@ struct venc_h264_inst {
	struct mtk_vcodec_mem pps_buf;
	bool work_buf_allocated;
	unsigned int frm_cnt;
	unsigned int skip_frm_cnt;
	unsigned int prepend_hdr;
	struct venc_vpu_inst vpu_inst;
	struct venc_h264_vsi *vsi;
@@ -327,6 +338,22 @@ static unsigned int h264_enc_wait_venc_done(struct venc_h264_inst *inst)
	return irq_status;
}

static int h264_frame_type(struct venc_h264_inst *inst)
{
	if ((inst->vsi->config.gop_size != 0 &&
	     (inst->frm_cnt % inst->vsi->config.gop_size) == 0) ||
	    (inst->frm_cnt == 0 && inst->vsi->config.gop_size == 0)) {
		/* IDR frame */
		return VENC_H264_IDR_FRM;
	} else if ((inst->vsi->config.intra_period != 0 &&
		    (inst->frm_cnt % inst->vsi->config.intra_period) == 0) ||
		   (inst->frm_cnt == 0 && inst->vsi->config.intra_period == 0)) {
		/* I frame */
		return VENC_H264_I_FRM;
	} else {
		return VENC_H264_P_FRM;  /* Note: B frames are not supported */
	}
}
static int h264_encode_sps(struct venc_h264_inst *inst,
			   struct mtk_vcodec_mem *bs_buf,
			   unsigned int *bs_size)
@@ -337,7 +364,7 @@ static int h264_encode_sps(struct venc_h264_inst *inst,
	mtk_vcodec_debug_enter(inst);

	ret = vpu_enc_encode(&inst->vpu_inst, H264_BS_MODE_SPS, NULL,
			     bs_buf, bs_size);
			     bs_buf, bs_size, NULL);
	if (ret)
		return ret;

@@ -364,7 +391,7 @@ static int h264_encode_pps(struct venc_h264_inst *inst,
	mtk_vcodec_debug_enter(inst);

	ret = vpu_enc_encode(&inst->vpu_inst, H264_BS_MODE_PPS, NULL,
			     bs_buf, bs_size);
			     bs_buf, bs_size, NULL);
	if (ret)
		return ret;

@@ -410,11 +437,18 @@ static int h264_encode_frame(struct venc_h264_inst *inst,
{
	int ret = 0;
	unsigned int irq_status;
	struct venc_frame_info frame_info;

	mtk_vcodec_debug_enter(inst);

	mtk_vcodec_debug(inst, "frm_cnt = %d\n ", inst->frm_cnt);
	frame_info.frm_count = inst->frm_cnt;
	frame_info.skip_frm_count = inst->skip_frm_cnt;
	frame_info.frm_type = h264_frame_type(inst);
	mtk_vcodec_debug(inst, "frm_count = %d,skip_frm_count =%d,frm_type=%d.\n",
			 frame_info.frm_count, frame_info.skip_frm_count,
			 frame_info.frm_type);
	ret = vpu_enc_encode(&inst->vpu_inst, H264_BS_MODE_FRAME, frm_buf,
			     bs_buf, bs_size);
			     bs_buf, bs_size, &frame_info);
	if (ret)
		return ret;

@@ -428,6 +462,7 @@ static int h264_encode_frame(struct venc_h264_inst *inst,
		       inst->work_bufs[VENC_H264_VPU_WORK_BUF_SKIP_FRAME].va,
		       *bs_size);
		++inst->frm_cnt;
		++inst->skip_frm_cnt;
		return ret;
	}

@@ -464,6 +499,7 @@ static void h264_encode_filler(struct venc_h264_inst *inst, void *buf,

static int h264_enc_init(struct mtk_vcodec_ctx *ctx)
{
	const bool is_ext = MTK_ENC_CTX_IS_EXT(ctx);
	int ret = 0;
	struct venc_h264_inst *inst;

@@ -473,7 +509,7 @@ static int h264_enc_init(struct mtk_vcodec_ctx *ctx)

	inst->ctx = ctx;
	inst->vpu_inst.ctx = ctx;
	inst->vpu_inst.id = IPI_VENC_H264;
	inst->vpu_inst.id = is_ext ? SCP_IPI_VENC_H264 : IPI_VENC_H264;
	inst->hw_base = mtk_vcodec_get_reg_addr(inst->ctx, VENC_SYS);

	mtk_vcodec_debug_enter(inst);
@@ -629,7 +665,12 @@ static int h264_enc_set_param(void *handle,
		inst->prepend_hdr = 1;
		mtk_vcodec_debug(inst, "set prepend header mode");
		break;

	case VENC_SET_PARAM_FORCE_INTRA:
	case VENC_SET_PARAM_GOP_SIZE:
	case VENC_SET_PARAM_INTRA_PERIOD:
		inst->frm_cnt = 0;
		inst->skip_frm_cnt = 0;
		fallthrough;
	default:
		ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
		break;
+2 −1
Original line number Diff line number Diff line
@@ -302,7 +302,8 @@ static int vp8_enc_encode_frame(struct venc_vp8_inst *inst,

	mtk_vcodec_debug(inst, "->frm_cnt=%d", inst->frm_cnt);

	ret = vpu_enc_encode(&inst->vpu_inst, 0, frm_buf, bs_buf, bs_size);
	ret = vpu_enc_encode(&inst->vpu_inst, 0, frm_buf, bs_buf, bs_size,
			     NULL);
	if (ret)
		return ret;

+13 −0
Original line number Diff line number Diff line
@@ -92,6 +92,19 @@ struct venc_enc_param {
	unsigned int gop_size;
};

/**
 * struct venc_frame_info - per-frame information to pass to the firmware.
 *
 * @frm_count:		sequential number for this frame
 * @skip_frm_count:	number of frames skipped so far while decoding
 * @frm_type:		type of the frame, from enum venc_h264_frame_type
 */
struct venc_frame_info {
	unsigned int frm_count;		/* per frame update */
	unsigned int skip_frm_count;	/* per frame update */
	unsigned int frm_type;		/* per frame update */
};

/*
 * struct venc_frm_buf - frame buffer information used in venc_if_encode()
 * @fb_addr: plane frame buffer addresses
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