Commit 0f05dad9 authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/sme' into for-next/core

* for-next/sme:
  arm64/fpsimd: Remove duplicate SYS_SVCR read
  arm64/signal: Clean up SVE/SME feature checking inconsistency
  arm64/sme: Expose SMIDR through sysfs
parents 288e21b6 4139320d
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+2 −1
Original line number Original line Diff line number Diff line
@@ -493,12 +493,13 @@ What: /sys/devices/system/cpu/cpuX/regs/
		/sys/devices/system/cpu/cpuX/regs/identification/
		/sys/devices/system/cpu/cpuX/regs/identification/
		/sys/devices/system/cpu/cpuX/regs/identification/midr_el1
		/sys/devices/system/cpu/cpuX/regs/identification/midr_el1
		/sys/devices/system/cpu/cpuX/regs/identification/revidr_el1
		/sys/devices/system/cpu/cpuX/regs/identification/revidr_el1
		/sys/devices/system/cpu/cpuX/regs/identification/smidr_el1
Date:		June 2016
Date:		June 2016
Contact:	Linux ARM Kernel Mailing list <linux-arm-kernel@lists.infradead.org>
Contact:	Linux ARM Kernel Mailing list <linux-arm-kernel@lists.infradead.org>
Description:	AArch64 CPU registers
Description:	AArch64 CPU registers


		'identification' directory exposes the CPU ID registers for
		'identification' directory exposes the CPU ID registers for
		identifying model and revision of the CPU.
		identifying model and revision of the CPU and SMCU.


What:		/sys/devices/system/cpu/aarch32_el0
What:		/sys/devices/system/cpu/aarch32_el0
Date:		May 2021
Date:		May 2021
+1 −0
Original line number Original line Diff line number Diff line
@@ -46,6 +46,7 @@ struct cpuinfo_arm64 {
	u64		reg_midr;
	u64		reg_midr;
	u64		reg_revidr;
	u64		reg_revidr;
	u64		reg_gmid;
	u64		reg_gmid;
	u64		reg_smidr;


	u64		reg_id_aa64dfr0;
	u64		reg_id_aa64dfr0;
	u64		reg_id_aa64dfr1;
	u64		reg_id_aa64dfr1;
+22 −1
Original line number Original line Diff line number Diff line
@@ -267,6 +267,7 @@ static struct kobj_type cpuregs_kobj_type = {


CPUREGS_ATTR_RO(midr_el1, midr);
CPUREGS_ATTR_RO(midr_el1, midr);
CPUREGS_ATTR_RO(revidr_el1, revidr);
CPUREGS_ATTR_RO(revidr_el1, revidr);
CPUREGS_ATTR_RO(smidr_el1, smidr);


static struct attribute *cpuregs_id_attrs[] = {
static struct attribute *cpuregs_id_attrs[] = {
	&cpuregs_attr_midr_el1.attr,
	&cpuregs_attr_midr_el1.attr,
@@ -279,6 +280,16 @@ static const struct attribute_group cpuregs_attr_group = {
	.name = "identification"
	.name = "identification"
};
};


static struct attribute *sme_cpuregs_id_attrs[] = {
	&cpuregs_attr_smidr_el1.attr,
	NULL
};

static const struct attribute_group sme_cpuregs_attr_group = {
	.attrs = sme_cpuregs_id_attrs,
	.name = "identification"
};

static int cpuid_cpu_online(unsigned int cpu)
static int cpuid_cpu_online(unsigned int cpu)
{
{
	int rc;
	int rc;
@@ -296,6 +307,8 @@ static int cpuid_cpu_online(unsigned int cpu)
	rc = sysfs_create_group(&info->kobj, &cpuregs_attr_group);
	rc = sysfs_create_group(&info->kobj, &cpuregs_attr_group);
	if (rc)
	if (rc)
		kobject_del(&info->kobj);
		kobject_del(&info->kobj);
	if (system_supports_sme())
		rc = sysfs_merge_group(&info->kobj, &sme_cpuregs_attr_group);
out:
out:
	return rc;
	return rc;
}
}
@@ -423,9 +436,17 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
		info->reg_zcr = read_zcr_features();
		info->reg_zcr = read_zcr_features();


	if (IS_ENABLED(CONFIG_ARM64_SME) &&
	if (IS_ENABLED(CONFIG_ARM64_SME) &&
	    id_aa64pfr1_sme(info->reg_id_aa64pfr1))
	    id_aa64pfr1_sme(info->reg_id_aa64pfr1)) {
		info->reg_smcr = read_smcr_features();
		info->reg_smcr = read_smcr_features();


		/*
		 * We mask out SMPS since even if the hardware
		 * supports priorities the kernel does not at present
		 * and we block access to them.
		 */
		info->reg_smidr = read_cpuid(SMIDR_EL1) & ~SMIDR_EL1_SMPS;
	}

	cpuinfo_detect_icache_policy(info);
	cpuinfo_detect_icache_policy(info);
}
}


+0 −1
Original line number Original line Diff line number Diff line
@@ -445,7 +445,6 @@ static void fpsimd_save(void)


	if (system_supports_sme()) {
	if (system_supports_sme()) {
		u64 *svcr = last->svcr;
		u64 *svcr = last->svcr;
		*svcr = read_sysreg_s(SYS_SVCR);


		*svcr = read_sysreg_s(SYS_SVCR);
		*svcr = read_sysreg_s(SYS_SVCR);


+12 −8
Original line number Original line Diff line number Diff line
@@ -280,6 +280,9 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)


		vl = task_get_sme_vl(current);
		vl = task_get_sme_vl(current);
	} else {
	} else {
		if (!system_supports_sve())
			return -EINVAL;

		vl = task_get_sve_vl(current);
		vl = task_get_sve_vl(current);
	}
	}


@@ -342,9 +345,14 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)


#else /* ! CONFIG_ARM64_SVE */
#else /* ! CONFIG_ARM64_SVE */


/* Turn any non-optimised out attempts to use these into a link error: */
static int restore_sve_fpsimd_context(struct user_ctxs *user)
{
	WARN_ON_ONCE(1);
	return -EINVAL;
}

/* Turn any non-optimised out attempts to use this into a link error: */
extern int preserve_sve_context(void __user *ctx);
extern int preserve_sve_context(void __user *ctx);
extern int restore_sve_fpsimd_context(struct user_ctxs *user);


#endif /* ! CONFIG_ARM64_SVE */
#endif /* ! CONFIG_ARM64_SVE */


@@ -649,15 +657,11 @@ static int restore_sigframe(struct pt_regs *regs,
		if (!user.fpsimd)
		if (!user.fpsimd)
			return -EINVAL;
			return -EINVAL;


		if (user.sve) {
		if (user.sve)
			if (!system_supports_sve())
				return -EINVAL;

			err = restore_sve_fpsimd_context(&user);
			err = restore_sve_fpsimd_context(&user);
		} else {
		else
			err = restore_fpsimd_context(user.fpsimd);
			err = restore_fpsimd_context(user.fpsimd);
	}
	}
	}


	if (err == 0 && system_supports_sme() && user.za)
	if (err == 0 && system_supports_sme() && user.za)
		err = restore_za_context(&user);
		err = restore_za_context(&user);