Commit 10a657dd authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/fb: Fold modifier CCS type/tiling attribute to plane caps 



By using the modifier plane capability flags to encode the modifiers'
CCS type and tiling attributes, it becomes simpler to the check for
any of these capabilities when providing the list of supported
modifiers.

This also allows distinguishing modifiers on future platforms where
platforms with the same display version support different modifiers. An
example is DG2 and ADLP, both being D13, where DG2 supports only F and X
tiling, while ADLP supports only Y and X tiling. With the
INTEL_PLANE_CAP_TILING_* flags added in this patch we can provide
the correct modifiers for each platform.

v2:
- Define PLANE_HAS_* with macros instead of an enum. (Jani)
- Rename PLANE_HAS_*_ANY to PLANE_HAS_*_MASK. (Jani)
- Rename PLANE_HAS_* to INTEL_PLANE_CAP_*.
- Set the CCS_RC_CC cap only for DISPLAY_VER >= 12.
- Set the TILING_Y cap only for DISPLAY_VER < 13 || ADLP.
- Simplify the SKL plane cap display version checks and move them
  to a separate function.

Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJuha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211027125150.2891371-1-imre.deak@intel.com
parent 7df7bca5

drivers/gpu/drm/i915/display/i9xx_plane.c

+1 −1
Original line number Diff line number Diff line
@@ -860,7 +860,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) 
		plane->disable_flip_done = ilk_primary_disable_flip_done;

	}



	modifiers = intel_fb_plane_get_modifiers(dev_priv, PLANE_HAS_TILING);

	modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_TILING_X);



	if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))

		ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,

drivers/gpu/drm/i915/display/intel_cursor.c

+1 −1
Original line number Diff line number Diff line
@@ -782,7 +782,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv, 
	if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))

		cursor->cursor.size = ~0;



	modifiers = intel_fb_plane_get_modifiers(dev_priv, PLANE_HAS_NO_CAPS);

	modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_NONE);



	ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,

				       0, &intel_cursor_plane_funcs,

drivers/gpu/drm/i915/display/intel_fb.c

+47 −41
Original line number Diff line number Diff line
@@ -120,29 +120,29 @@ struct intel_modifier_desc { 
	.formats = format_list, \

	.format_count = ARRAY_SIZE(format_list)



	u8 tiling;

	u8 is_linear:1;

	u8 plane_caps;



	struct {

#define INTEL_CCS_RC		BIT(0)

#define INTEL_CCS_RC_CC		BIT(1)

#define INTEL_CCS_MC		BIT(2)



#define INTEL_CCS_ANY		(INTEL_CCS_RC | INTEL_CCS_RC_CC | INTEL_CCS_MC)

		u8 type:3;

		u8 cc_planes:3;

		u8 packed_aux_planes:4;

		u8 planar_aux_planes:4;

	} ccs;

};



#define INTEL_PLANE_CAP_CCS_MASK	(INTEL_PLANE_CAP_CCS_RC | \

					 INTEL_PLANE_CAP_CCS_RC_CC | \

					 INTEL_PLANE_CAP_CCS_MC)

#define INTEL_PLANE_CAP_TILING_MASK	(INTEL_PLANE_CAP_TILING_X | \

					 INTEL_PLANE_CAP_TILING_Y | \

					 INTEL_PLANE_CAP_TILING_Yf)

#define INTEL_PLANE_CAP_TILING_NONE	0



static const struct intel_modifier_desc intel_modifiers[] = {

	{

		.modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,

		.display_ver = { 12, 13 },

		.tiling = I915_TILING_Y,

		.plane_caps = INTEL_PLANE_CAP_TILING_Y | INTEL_PLANE_CAP_CCS_MC,



		.ccs.type = INTEL_CCS_MC,

		.ccs.packed_aux_planes = BIT(1),

		.ccs.planar_aux_planes = BIT(2) | BIT(3),
@@ -150,18 +150,16 @@ static const struct intel_modifier_desc intel_modifiers[] = { 
	}, {

		.modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,

		.display_ver = { 12, 13 },

		.tiling = I915_TILING_Y,

		.plane_caps = INTEL_PLANE_CAP_TILING_Y | INTEL_PLANE_CAP_CCS_RC,



		.ccs.type = INTEL_CCS_RC,

		.ccs.packed_aux_planes = BIT(1),



		FORMAT_OVERRIDE(gen12_ccs_formats),

	}, {

		.modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC,

		.display_ver = { 12, 13 },

		.tiling = I915_TILING_Y,

		.plane_caps = INTEL_PLANE_CAP_TILING_Y | INTEL_PLANE_CAP_CCS_RC_CC,



		.ccs.type = INTEL_CCS_RC_CC,

		.ccs.cc_planes = BIT(2),

		.ccs.packed_aux_planes = BIT(1),
@@ -169,39 +167,34 @@ static const struct intel_modifier_desc intel_modifiers[] = { 
	}, {

		.modifier = I915_FORMAT_MOD_Yf_TILED_CCS,

		.display_ver = { 9, 11 },

		.tiling = I915_TILING_NONE,

		.plane_caps = INTEL_PLANE_CAP_TILING_Yf | INTEL_PLANE_CAP_CCS_RC,



		.ccs.type = INTEL_CCS_RC,

		.ccs.packed_aux_planes = BIT(1),



		FORMAT_OVERRIDE(skl_ccs_formats),

	}, {

		.modifier = I915_FORMAT_MOD_Y_TILED_CCS,

		.display_ver = { 9, 11 },

		.tiling = I915_TILING_Y,

		.plane_caps = INTEL_PLANE_CAP_TILING_Y | INTEL_PLANE_CAP_CCS_RC,



		.ccs.type = INTEL_CCS_RC,

		.ccs.packed_aux_planes = BIT(1),



		FORMAT_OVERRIDE(skl_ccs_formats),

	}, {

		.modifier = I915_FORMAT_MOD_Yf_TILED,

		.display_ver = { 9, 11 },

		.tiling = I915_TILING_NONE,

		.plane_caps = INTEL_PLANE_CAP_TILING_Yf,

	}, {

		.modifier = I915_FORMAT_MOD_Y_TILED,

		.display_ver = { 9, 13 },

		.tiling = I915_TILING_Y,

		.plane_caps = INTEL_PLANE_CAP_TILING_Y,

	}, {

		.modifier = I915_FORMAT_MOD_X_TILED,

		.display_ver = DISPLAY_VER_ALL,

		.tiling = I915_TILING_X,

		.plane_caps = INTEL_PLANE_CAP_TILING_X,

	}, {

		.modifier = DRM_FORMAT_MOD_LINEAR,

		.display_ver = DISPLAY_VER_ALL,

		.tiling = I915_TILING_NONE,



		.is_linear = true,

	},

};
@@ -259,9 +252,14 @@ intel_fb_get_format_info(const struct drm_mode_fb_cmd2 *cmd) 
	return lookup_format_info(md->formats, md->format_count, cmd->pixel_format);

}



static bool is_ccs_type_modifier(const struct intel_modifier_desc *md, u8 ccs_type)

static bool plane_caps_contain_any(u8 caps, u8 mask)

{

	return caps & mask;

}



static bool plane_caps_contain_all(u8 caps, u8 mask)

{

	return md->ccs.type & ccs_type;

	return (caps & mask) == mask;

}



/**
@@ -274,7 +272,8 @@ static bool is_ccs_type_modifier(const struct intel_modifier_desc *md, u8 ccs_ty 
 */

bool intel_fb_is_ccs_modifier(u64 modifier)

{

	return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_ANY);

	return plane_caps_contain_any(lookup_modifier(modifier)->plane_caps,

				      INTEL_PLANE_CAP_CCS_MASK);

}



/**
@@ -286,7 +285,8 @@ bool intel_fb_is_ccs_modifier(u64 modifier) 
 */

bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier)

{

	return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_RC_CC);

	return plane_caps_contain_any(lookup_modifier(modifier)->plane_caps,

				      INTEL_PLANE_CAP_CCS_RC_CC);

}



/**
@@ -298,7 +298,8 @@ bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier) 
 */

bool intel_fb_is_mc_ccs_modifier(u64 modifier)

{

	return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_MC);

	return plane_caps_contain_any(lookup_modifier(modifier)->plane_caps,

				      INTEL_PLANE_CAP_CCS_MC);

}



static bool check_modifier_display_ver_range(const struct intel_modifier_desc *md,
@@ -315,16 +316,7 @@ static bool plane_has_modifier(struct drm_i915_private *i915, 
	if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until))

		return false;



	if (!md->is_linear &&

	    !(plane_caps & PLANE_HAS_TILING))

		return false;



	if (is_ccs_type_modifier(md, INTEL_CCS_RC | INTEL_CCS_RC_CC) &&

	    !(plane_caps & PLANE_HAS_CCS_RC))

		return false;



	if (is_ccs_type_modifier(md, INTEL_CCS_MC) &&

	    !(plane_caps & PLANE_HAS_CCS_MC))

	if (!plane_caps_contain_all(plane_caps, md->plane_caps))

		return false;



	return true;
@@ -392,7 +384,7 @@ static bool format_is_yuv_semiplanar(const struct intel_modifier_desc *md, 
	if (!info->is_yuv)

		return false;



	if (is_ccs_type_modifier(md, INTEL_CCS_ANY))

	if (plane_caps_contain_any(md->plane_caps, INTEL_PLANE_CAP_CCS_MASK))

		yuv_planes = 4;

	else

		yuv_planes = 2;
@@ -672,7 +664,21 @@ intel_fb_align_height(const struct drm_framebuffer *fb, 


static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)

{

	return lookup_modifier(fb_modifier)->tiling;

	u8 tiling_caps = lookup_modifier(fb_modifier)->plane_caps &

			 INTEL_PLANE_CAP_TILING_MASK;



	switch (tiling_caps) {

	case INTEL_PLANE_CAP_TILING_Y:

		return I915_TILING_Y;

	case INTEL_PLANE_CAP_TILING_X:

		return I915_TILING_X;

	case INTEL_PLANE_CAP_TILING_Yf:

	case INTEL_PLANE_CAP_TILING_NONE:

		return I915_TILING_NONE;

	default:

		MISSING_CASE(tiling_caps);

		return I915_TILING_NONE;

	}

}



unsigned int intel_cursor_alignment(const struct drm_i915_private *i915)

drivers/gpu/drm/i915/display/intel_fb.h

+7 −6
Original line number Diff line number Diff line
@@ -20,12 +20,13 @@ struct intel_framebuffer; 
struct intel_plane;

struct intel_plane_state;



enum intel_plane_caps {

	PLANE_HAS_NO_CAPS = 0,

	PLANE_HAS_TILING = BIT(0),

	PLANE_HAS_CCS_RC = BIT(1),

	PLANE_HAS_CCS_MC = BIT(2),

};

#define INTEL_PLANE_CAP_NONE		0

#define INTEL_PLANE_CAP_CCS_RC		BIT(0)

#define INTEL_PLANE_CAP_CCS_RC_CC	BIT(1)

#define INTEL_PLANE_CAP_CCS_MC		BIT(2)

#define INTEL_PLANE_CAP_TILING_X	BIT(3)

#define INTEL_PLANE_CAP_TILING_Y	BIT(4)

#define INTEL_PLANE_CAP_TILING_Yf	BIT(5)



bool intel_fb_is_ccs_modifier(u64 modifier);

bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier);

drivers/gpu/drm/i915/display/intel_sprite.c

+1 −1
Original line number Diff line number Diff line
@@ -1810,7 +1810,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, 
	plane->id = PLANE_SPRITE0 + sprite;

	plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);



	modifiers = intel_fb_plane_get_modifiers(dev_priv, PLANE_HAS_TILING);

	modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_TILING_X);



	ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,

				       0, plane_funcs,