Commit 10f51857 authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
Browse files

drm/amd/display: Fix Dali clk mgr construct 



[WHY]
Dali is currently being misinterpreted as Renoir,
as a result uses wrong clk mgr constructor

[HOW]
Add check to init Dali as Raven2 before it can be misidentified
Clean up & fix Raven2 & Dali ASIC checks
Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Reviewed-by: default avatarEric Yang <eric.yang2@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f42ea55b

drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c

+7 −0
Original line number Diff line number Diff line
@@ -134,6 +134,13 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p 


#if defined(CONFIG_DRM_AMD_DC_DCN)

	case FAMILY_RV:

		if (ASICREV_IS_DALI(asic_id.hw_internal_rev)) {

			/* TEMP: this check has to come before ASICREV_IS_RENOIR */

			/* which also incorrectly returns true for Dali */

			rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu);

			break;

		}



		if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) {

			rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);

			break;

drivers/gpu/drm/amd/display/include/dal_asic_id.h

+5 −7
Original line number Diff line number Diff line
@@ -134,19 +134,17 @@ 
#define PICASSO_A0 0x41

/* DCN1_01 */

#define RAVEN2_A0 0x81

#define RAVEN2_15D8_REV_E3 0xE3

#define RAVEN2_15D8_REV_E4 0xE4

#define RAVEN1_F0 0xF0

#define RAVEN_UNKNOWN 0xFF



#define PICASSO_15D8_REV_E3 0xE3

#define PICASSO_15D8_REV_E4 0xE4



#define ASICREV_IS_RAVEN(eChipRev) ((eChipRev >= RAVEN_A0) && eChipRev < RAVEN_UNKNOWN)

#define ASICREV_IS_PICASSO(eChipRev) ((eChipRev >= PICASSO_A0) && (eChipRev < RAVEN2_A0))

#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < PICASSO_15D8_REV_E3))

#define ASICREV_IS_DALI(eChipRev) ((eChipRev >= PICASSO_15D8_REV_E3) && (eChipRev < RAVEN1_F0))



#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < RAVEN1_F0))

#define ASICREV_IS_RV1_F0(eChipRev) ((eChipRev >= RAVEN1_F0) && (eChipRev < RAVEN_UNKNOWN))



#define ASICREV_IS_DALI(eChipRev) ((eChipRev == RAVEN2_15D8_REV_E3) \

		|| (eChipRev == RAVEN2_15D8_REV_E4))



#define FAMILY_RV 142 /* DCN 1*/