Commit 11727295 authored by Bjorn Andersson's avatar Bjorn Andersson
Browse files

arm64: dts: qcom: sm8450: Add remoteproc enablers and instances 



The Qualcomm SM8450 carries the familiar set of audio, compute, sensor
and modem remoteprocs. Add these and their dependencies.

Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220128025513.97188-13-bjorn.andersson@linaro.org
parent 73419e4d

arch/arm64/boot/dts/qcom/sm8450.dtsi

+297 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <dt-bindings/clock/qcom,gcc-sm8450.h>

#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/mailbox/qcom-ipcc.h>

#include <dt-bindings/power/qcom-rpmpd.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>
@@ -460,6 +461,15 @@ cvp_mem: memory@9ee00000 { 
			no-map;

		};



		rmtfs_mem: memory@9fd00000 {

			compatible = "qcom,rmtfs-mem";

			reg = <0x0 0x9fd00000 0x0 0x280000>;

			no-map;



			qcom,client-id = <1>;

			qcom,vmid = <15>;

		};



		global_sync_mem: memory@a6f00000 {

			reg = <0x0 0xa6f00000 0x0 0x100000>;

			no-map;
@@ -540,6 +550,113 @@ trusted_apps_ext_mem: memory@ed900000 { 
		};

	};



	smp2p-adsp {

		compatible = "qcom,smp2p";

		qcom,smem = <443>, <429>;

		interrupts-extended = <&ipcc IPCC_CLIENT_LPASS

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_LPASS

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <2>;



		smp2p_adsp_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		smp2p_adsp_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	smp2p-cdsp {

		compatible = "qcom,smp2p";

		qcom,smem = <94>, <432>;

		interrupts-extended = <&ipcc IPCC_CLIENT_CDSP

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_CDSP

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <5>;



		smp2p_cdsp_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		smp2p_cdsp_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	smp2p-modem {

		compatible = "qcom,smp2p";

		qcom,smem = <435>, <428>;

		interrupts-extended = <&ipcc IPCC_CLIENT_MPSS

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_MPSS

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <1>;



		smp2p_modem_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		smp2p_modem_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};



		ipa_smp2p_out: ipa-ap-to-modem {

			qcom,entry-name = "ipa";

			#qcom,smem-state-cells = <1>;

		};



		ipa_smp2p_in: ipa-modem-to-ap {

			qcom,entry-name = "ipa";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	smp2p-slpi {

		compatible = "qcom,smp2p";

		qcom,smem = <481>, <430>;

		interrupts-extended = <&ipcc IPCC_CLIENT_SLPI

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_SLPI

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <3>;



		smp2p_slpi_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		smp2p_slpi_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	soc: soc@0 {

		#address-cells = <2>;

		#size-cells = <2>;
@@ -672,6 +789,167 @@ usb_1_ssphy: phy@88e9200 { 
			};

		};



		remoteproc_slpi: remoteproc@2400000 {

			compatible = "qcom,sm8450-slpi-pas";

			reg = <0 0x02400000 0 0x4000>;



			interrupts-extended = <&pdc 9 IRQ_TYPE_LEVEL_HIGH>,

					      <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready",

					  "handover", "stop-ack";



			clocks = <&rpmhcc RPMH_CXO_CLK>;

			clock-names = "xo";



			power-domains = <&rpmhpd SM8450_LCX>,

					<&rpmhpd SM8450_LMX>;

			power-domain-names = "lcx", "lmx";



			memory-region = <&slpi_mem>;



			qcom,qmp = <&aoss_qmp>;



			qcom,smem-states = <&smp2p_slpi_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts-extended = <&ipcc IPCC_CLIENT_SLPI

							     IPCC_MPROC_SIGNAL_GLINK_QMP

							     IRQ_TYPE_EDGE_RISING>;

				mboxes = <&ipcc IPCC_CLIENT_SLPI

						IPCC_MPROC_SIGNAL_GLINK_QMP>;



				label = "slpi";

				qcom,remote-pid = <3>;

			};

		};



		remoteproc_adsp: remoteproc@30000000 {

			compatible = "qcom,sm8450-adsp-pas";

			reg = <0 0x030000000 0 0x100>;



			interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,

					      <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready",

					  "handover", "stop-ack";



			clocks = <&rpmhcc RPMH_CXO_CLK>;

			clock-names = "xo";



			power-domains = <&rpmhpd SM8450_LCX>,

					<&rpmhpd SM8450_LMX>;

			power-domain-names = "lcx", "lmx";



			memory-region = <&adsp_mem>;



			qcom,qmp = <&aoss_qmp>;



			qcom,smem-states = <&smp2p_adsp_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			remoteproc_adsp_glink: glink-edge {

				interrupts-extended = <&ipcc IPCC_CLIENT_LPASS

							     IPCC_MPROC_SIGNAL_GLINK_QMP

							     IRQ_TYPE_EDGE_RISING>;

				mboxes = <&ipcc IPCC_CLIENT_LPASS

						IPCC_MPROC_SIGNAL_GLINK_QMP>;



				label = "lpass";

				qcom,remote-pid = <2>;

			};

		};



		remoteproc_cdsp: remoteproc@32300000 {

			compatible = "qcom,sm8450-cdsp-pas";

			reg = <0 0x032300000 0 0x1400000>;



			interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,

					      <&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready",

					  "handover", "stop-ack";



			clocks = <&rpmhcc RPMH_CXO_CLK>;

			clock-names = "xo";



			power-domains = <&rpmhpd SM8450_CX>,

					<&rpmhpd SM8450_MXC>;

			power-domain-names = "cx", "mxc";



			memory-region = <&cdsp_mem>;



			qcom,qmp = <&aoss_qmp>;



			qcom,smem-states = <&smp2p_cdsp_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts-extended = <&ipcc IPCC_CLIENT_CDSP

							     IPCC_MPROC_SIGNAL_GLINK_QMP

							     IRQ_TYPE_EDGE_RISING>;

				mboxes = <&ipcc IPCC_CLIENT_CDSP

						IPCC_MPROC_SIGNAL_GLINK_QMP>;



				label = "cdsp";

				qcom,remote-pid = <5>;

			};

		};



		remoteproc_mpss: remoteproc@4080000 {

			compatible = "qcom,sm8450-mpss-pas";

			reg = <0x0 0x04080000 0x0 0x4040>;



			interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,

					      <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>,

					      <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready", "handover",

					  "stop-ack", "shutdown-ack";



			clocks = <&rpmhcc RPMH_CXO_CLK>;

			clock-names = "xo";



			power-domains = <&rpmhpd 0>,

					<&rpmhpd 12>;

			power-domain-names = "cx", "mss";



			memory-region = <&mpss_mem>;



			qcom,qmp = <&aoss_qmp>;



			qcom,smem-states = <&smp2p_modem_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts-extended = <&ipcc IPCC_CLIENT_MPSS

							     IPCC_MPROC_SIGNAL_GLINK_QMP

							     IRQ_TYPE_EDGE_RISING>;

				mboxes = <&ipcc IPCC_CLIENT_MPSS

						IPCC_MPROC_SIGNAL_GLINK_QMP>;

				interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;

				label = "modem";

				qcom,remote-pid = <1>;

			};

		};



		pdc: interrupt-controller@b220000 {

			compatible = "qcom,sm8450-pdc", "qcom,pdc";

			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
@@ -682,6 +960,25 @@ pdc: interrupt-controller@b220000 { 
			interrupt-controller;

		};



		aoss_qmp: power-controller@c300000 {

			compatible = "qcom,sm8450-aoss-qmp", "qcom,aoss-qmp";

			reg = <0 0x0c300000 0 0x400>;

			interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP

						     IRQ_TYPE_EDGE_RISING>;

			mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;



			#clock-cells = <0>;

		};



		ipcc: mailbox@ed18000 {

			compatible = "qcom,sm8450-ipcc", "qcom,ipcc";

			reg = <0 0x0ed18000 0 0x1000>;

			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-controller;

			#interrupt-cells = <3>;

			#mbox-cells = <2>;

		};



		tlmm: pinctrl@f100000 {

			compatible = "qcom,sm8450-tlmm";

			reg = <0 0x0f100000 0 0x300000>;