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Commit 13fecb83 authored by Steve Wise's avatar Steve Wise Committed by Roland Dreier
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RDMA/cxgb4: Zero out ISGL padding 



The HW design requires zeroing any pad in SGLs.

Signed-off-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarRoland Dreier <rolandd@cisco.com>
parent af93fb5d
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