[media] cx25821-medusa-video.c: Change line endings (14098bc7) · Commits · jan.koester / Linux

drivers/media/video/cx25821/cx25821-medusa-video.c

+159 −241

Original line number	Original line	Diff line number	Diff line
	@@ -99,82 +99,67 @@ static int medusa_initialize_ntsc(struct cx25821_dev *dev)

	for (i = 0; i < MAX_DECODERS; i++) {		for (i = 0; i < MAX_DECODERS; i++) {
	/* set video format NTSC-M */		/* set video format NTSC-M */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),		MODE_CTRL + (0x200 * i), &tmp);
	&tmp);
	value &= 0xFFFFFFF0;		value &= 0xFFFFFFF0;
	/* enable the fast locking mode bit[16] */		/* enable the fast locking mode bit[16] */
	value \|= 0x10001;		value \|= 0x10001;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),		MODE_CTRL + (0x200 * i), value);
	value);

	/* resolution NTSC 720x480 */		/* resolution NTSC 720x480 */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	HORIZ_TIM_CTRL + (0x200 * i), &tmp);		HORIZ_TIM_CTRL + (0x200 * i), &tmp);
	value &= 0x00C00C00;		value &= 0x00C00C00;
	value \|= 0x612D0074;		value \|= 0x612D0074;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	HORIZ_TIM_CTRL + (0x200 * i), value);		HORIZ_TIM_CTRL + (0x200 * i), value);

	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	VERT_TIM_CTRL + (0x200 * i), &tmp);		VERT_TIM_CTRL + (0x200 * i), &tmp);
	value &= 0x00C00C00;		value &= 0x00C00C00;
	value \|= 0x1C1E001A; /* vblank_cnt + 2 to get camera ID */		value \|= 0x1C1E001A; /* vblank_cnt + 2 to get camera ID */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	VERT_TIM_CTRL + (0x200 * i), value);		VERT_TIM_CTRL + (0x200 * i), value);

	/* chroma subcarrier step size */		/* chroma subcarrier step size */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	SC_STEP_SIZE + (0x200 * i), 0x43E00000);		SC_STEP_SIZE + (0x200 * i), 0x43E00000);

	/* enable VIP optional active */		/* enable VIP optional active */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	OUT_CTRL_NS + (0x200 * i), &tmp);		OUT_CTRL_NS + (0x200 * i), &tmp);
	value &= 0xFFFBFFFF;		value &= 0xFFFBFFFF;
	value \|= 0x00040000;		value \|= 0x00040000;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	OUT_CTRL_NS + (0x200 * i), value);		OUT_CTRL_NS + (0x200 * i), value);

	/* enable VIP optional active (VIP_OPT_AL) for direct output. */		/* enable VIP optional active (VIP_OPT_AL) for direct output. */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),		OUT_CTRL1 + (0x200 * i), &tmp);
	&tmp);
	value &= 0xFFFBFFFF;		value &= 0xFFFBFFFF;
	value \|= 0x00040000;		value \|= 0x00040000;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),		OUT_CTRL1 + (0x200 * i), value);
	value);

	/*		/*
	* clear VPRES_VERT_EN bit, fixes the chroma run away problem		* clear VPRES_VERT_EN bit, fixes the chroma run away problem
	* when the input switching rate < 16 fields		* when the input switching rate < 16 fields
	*/		*/
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	MISC_TIM_CTRL + (0x200 * i), &tmp);		MISC_TIM_CTRL + (0x200 * i), &tmp);
	/* disable special play detection */		/* disable special play detection */
	value = setBitAtPos(value, 14);		value = setBitAtPos(value, 14);
	value = clearBitAtPos(value, 15);		value = clearBitAtPos(value, 15);
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	MISC_TIM_CTRL + (0x200 * i), value);		MISC_TIM_CTRL + (0x200 * i), value);

	/* set vbi_gate_en to 0 */		/* set vbi_gate_en to 0 */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),		DFE_CTRL1 + (0x200 * i), &tmp);
	&tmp);
	value = clearBitAtPos(value, 29);		value = clearBitAtPos(value, 29);
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),		DFE_CTRL1 + (0x200 * i), value);
	value);

	/* Enable the generation of blue field output if no video */		/* Enable the generation of blue field output if no video */
	medusa_enable_bluefield_output(dev, i, 1);		medusa_enable_bluefield_output(dev, i, 1);
	@@ -182,60 +167,48 @@ static int medusa_initialize_ntsc(struct cx25821_dev *dev)

	for (i = 0; i < MAX_ENCODERS; i++) {		for (i = 0; i < MAX_ENCODERS; i++) {
	/* NTSC hclock */		/* NTSC hclock */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_1 + (0x100 * i), &tmp);		DENC_A_REG_1 + (0x100 * i), &tmp);
	value &= 0xF000FC00;		value &= 0xF000FC00;
	value \|= 0x06B402D0;		value \|= 0x06B402D0;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_1 + (0x100 * i), value);		DENC_A_REG_1 + (0x100 * i), value);

	/* burst begin and burst end */		/* burst begin and burst end */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_2 + (0x100 * i), &tmp);		DENC_A_REG_2 + (0x100 * i), &tmp);
	value &= 0xFF000000;		value &= 0xFF000000;
	value \|= 0x007E9054;		value \|= 0x007E9054;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_2 + (0x100 * i), value);		DENC_A_REG_2 + (0x100 * i), value);

	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_3 + (0x100 * i), &tmp);		DENC_A_REG_3 + (0x100 * i), &tmp);
	value &= 0xFC00FE00;		value &= 0xFC00FE00;
	value \|= 0x00EC00F0;		value \|= 0x00EC00F0;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_3 + (0x100 * i), value);		DENC_A_REG_3 + (0x100 * i), value);

	/* set NTSC vblank, no phase alternation, 7.5 IRE pedestal */		/* set NTSC vblank, no phase alternation, 7.5 IRE pedestal */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_4 + (0x100 * i), &tmp);		DENC_A_REG_4 + (0x100 * i), &tmp);
	value &= 0x00FCFFFF;		value &= 0x00FCFFFF;
	value \|= 0x13020000;		value \|= 0x13020000;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_4 + (0x100 * i), value);		DENC_A_REG_4 + (0x100 * i), value);

	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_5 + (0x100 * i), &tmp);		DENC_A_REG_5 + (0x100 * i), &tmp);
	value &= 0xFFFF0000;		value &= 0xFFFF0000;
	value \|= 0x0000E575;		value \|= 0x0000E575;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_5 + (0x100 * i), value);		DENC_A_REG_5 + (0x100 * i), value);

	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_6 + (0x100 * i), 0x009A89C1);		DENC_A_REG_6 + (0x100 * i), 0x009A89C1);

	/* Subcarrier Increment */		/* Subcarrier Increment */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_7 + (0x100 * i), 0x21F07C1F);		DENC_A_REG_7 + (0x100 * i), 0x21F07C1F);
	}		}

	@@ -261,34 +234,27 @@ static int medusa_PALCombInit(struct cx25821_dev *dev, int dec)
	u32 value = 0, tmp = 0;		u32 value = 0, tmp = 0;

	/* Setup for 2D threshold */		/* Setup for 2D threshold */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_HFS_CFG + (0x200 * dec),		COMB_2D_HFS_CFG + (0x200 * dec), 0x20002861);
	0x20002861);		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	ret_val =		COMB_2D_HFD_CFG + (0x200 * dec), 0x20002861);
	cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_HFD_CFG + (0x200 * dec),		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	0x20002861);		COMB_2D_LF_CFG + (0x200 * dec), 0x200A1023);
	ret_val =
	cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_LF_CFG + (0x200 * dec),
	0x200A1023);

	/* Setup flat chroma and luma thresholds */		/* Setup flat chroma and luma thresholds */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	COMB_FLAT_THRESH_CTRL + (0x200 * dec), &tmp);		COMB_FLAT_THRESH_CTRL + (0x200 * dec), &tmp);
	value &= 0x06230000;		value &= 0x06230000;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	COMB_FLAT_THRESH_CTRL + (0x200 * dec), value);		COMB_FLAT_THRESH_CTRL + (0x200 * dec), value);

	/* set comb 2D blend */		/* set comb 2D blend */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], COMB_2D_BLEND + (0x200 * dec),		COMB_2D_BLEND + (0x200 * dec), 0x210F0F0F);
	0x210F0F0F);

	/* COMB MISC CONTROL */		/* COMB MISC CONTROL */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], COMB_MISC_CTRL + (0x200 * dec),		COMB_MISC_CTRL + (0x200 * dec), 0x41120A7F);
	0x41120A7F);

	return ret_val;		return ret_val;
	}		}
	@@ -304,83 +270,68 @@ static int medusa_initialize_pal(struct cx25821_dev *dev)

	for (i = 0; i < MAX_DECODERS; i++) {		for (i = 0; i < MAX_DECODERS; i++) {
	/* set video format PAL-BDGHI */		/* set video format PAL-BDGHI */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),		MODE_CTRL + (0x200 * i), &tmp);
	&tmp);
	value &= 0xFFFFFFF0;		value &= 0xFFFFFFF0;
	/* enable the fast locking mode bit[16] */		/* enable the fast locking mode bit[16] */
	value \|= 0x10004;		value \|= 0x10004;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], MODE_CTRL + (0x200 * i),		MODE_CTRL + (0x200 * i), value);
	value);

	/* resolution PAL 720x576 */		/* resolution PAL 720x576 */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	HORIZ_TIM_CTRL + (0x200 * i), &tmp);		HORIZ_TIM_CTRL + (0x200 * i), &tmp);
	value &= 0x00C00C00;		value &= 0x00C00C00;
	value \|= 0x632D007D;		value \|= 0x632D007D;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	HORIZ_TIM_CTRL + (0x200 * i), value);		HORIZ_TIM_CTRL + (0x200 * i), value);

	/* vblank656_cnt=x26, vactive_cnt=240h, vblank_cnt=x24 */		/* vblank656_cnt=x26, vactive_cnt=240h, vblank_cnt=x24 */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	VERT_TIM_CTRL + (0x200 * i), &tmp);		VERT_TIM_CTRL + (0x200 * i), &tmp);
	value &= 0x00C00C00;		value &= 0x00C00C00;
	value \|= 0x28240026; /* vblank_cnt + 2 to get camera ID */		value \|= 0x28240026; /* vblank_cnt + 2 to get camera ID */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	VERT_TIM_CTRL + (0x200 * i), value);		VERT_TIM_CTRL + (0x200 * i), value);

	/* chroma subcarrier step size */		/* chroma subcarrier step size */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	SC_STEP_SIZE + (0x200 * i), 0x5411E2D0);		SC_STEP_SIZE + (0x200 * i), 0x5411E2D0);

	/* enable VIP optional active */		/* enable VIP optional active */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	OUT_CTRL_NS + (0x200 * i), &tmp);		OUT_CTRL_NS + (0x200 * i), &tmp);
	value &= 0xFFFBFFFF;		value &= 0xFFFBFFFF;
	value \|= 0x00040000;		value \|= 0x00040000;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	OUT_CTRL_NS + (0x200 * i), value);		OUT_CTRL_NS + (0x200 * i), value);

	/* enable VIP optional active (VIP_OPT_AL) for direct output. */		/* enable VIP optional active (VIP_OPT_AL) for direct output. */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),		OUT_CTRL1 + (0x200 * i), &tmp);
	&tmp);
	value &= 0xFFFBFFFF;		value &= 0xFFFBFFFF;
	value \|= 0x00040000;		value \|= 0x00040000;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], OUT_CTRL1 + (0x200 * i),		OUT_CTRL1 + (0x200 * i), value);
	value);

	/*		/*
	* clear VPRES_VERT_EN bit, fixes the chroma run away problem		* clear VPRES_VERT_EN bit, fixes the chroma run away problem
	* when the input switching rate < 16 fields		* when the input switching rate < 16 fields
	*/		*/
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	MISC_TIM_CTRL + (0x200 * i), &tmp);		MISC_TIM_CTRL + (0x200 * i), &tmp);
	/* disable special play detection */		/* disable special play detection */
	value = setBitAtPos(value, 14);		value = setBitAtPos(value, 14);
	value = clearBitAtPos(value, 15);		value = clearBitAtPos(value, 15);
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	MISC_TIM_CTRL + (0x200 * i), value);		MISC_TIM_CTRL + (0x200 * i), value);

	/* set vbi_gate_en to 0 */		/* set vbi_gate_en to 0 */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),		DFE_CTRL1 + (0x200 * i), &tmp);
	&tmp);
	value = clearBitAtPos(value, 29);		value = clearBitAtPos(value, 29);
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0], DFE_CTRL1 + (0x200 * i),		DFE_CTRL1 + (0x200 * i), value);
	value);

	medusa_PALCombInit(dev, i);		medusa_PALCombInit(dev, i);

	@@ -390,61 +341,49 @@ static int medusa_initialize_pal(struct cx25821_dev *dev)

	for (i = 0; i < MAX_ENCODERS; i++) {		for (i = 0; i < MAX_ENCODERS; i++) {
	/* PAL hclock */		/* PAL hclock */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_1 + (0x100 * i), &tmp);		DENC_A_REG_1 + (0x100 * i), &tmp);
	value &= 0xF000FC00;		value &= 0xF000FC00;
	value \|= 0x06C002D0;		value \|= 0x06C002D0;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_1 + (0x100 * i), value);		DENC_A_REG_1 + (0x100 * i), value);

	/* burst begin and burst end */		/* burst begin and burst end */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_2 + (0x100 * i), &tmp);		DENC_A_REG_2 + (0x100 * i), &tmp);
	value &= 0xFF000000;		value &= 0xFF000000;
	value \|= 0x007E9754;		value \|= 0x007E9754;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_2 + (0x100 * i), value);		DENC_A_REG_2 + (0x100 * i), value);

	/* hblank and vactive */		/* hblank and vactive */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_3 + (0x100 * i), &tmp);		DENC_A_REG_3 + (0x100 * i), &tmp);
	value &= 0xFC00FE00;		value &= 0xFC00FE00;
	value \|= 0x00FC0120;		value \|= 0x00FC0120;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_3 + (0x100 * i), value);		DENC_A_REG_3 + (0x100 * i), value);

	/* set PAL vblank, phase alternation, 0 IRE pedestal */		/* set PAL vblank, phase alternation, 0 IRE pedestal */
	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_4 + (0x100 * i), &tmp);		DENC_A_REG_4 + (0x100 * i), &tmp);
	value &= 0x00FCFFFF;		value &= 0x00FCFFFF;
	value \|= 0x14010000;		value \|= 0x14010000;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_4 + (0x100 * i), value);		DENC_A_REG_4 + (0x100 * i), value);

	value =		value = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	DENC_A_REG_5 + (0x100 * i), &tmp);		DENC_A_REG_5 + (0x100 * i), &tmp);
	value &= 0xFFFF0000;		value &= 0xFFFF0000;
	value \|= 0x0000F078;		value \|= 0x0000F078;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_5 + (0x100 * i), value);		DENC_A_REG_5 + (0x100 * i), value);

	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_6 + (0x100 * i), 0x00A493CF);		DENC_A_REG_6 + (0x100 * i), 0x00A493CF);

	/* Subcarrier Increment */		/* Subcarrier Increment */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	DENC_A_REG_7 + (0x100 * i), 0x2A098ACB);		DENC_A_REG_7 + (0x100 * i), 0x2A098ACB);
	}		}

	@@ -543,11 +482,9 @@ void medusa_set_resolution(struct cx25821_dev *dev, int width,

	for (; decoder < decoder_count; decoder++) {		for (; decoder < decoder_count; decoder++) {
	/* write scaling values for each decoder */		/* write scaling values for each decoder */
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	HSCALE_CTRL + (0x200 * decoder), hscale);		HSCALE_CTRL + (0x200 * decoder), hscale);
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	VSCALE_CTRL + (0x200 * decoder), vscale);		VSCALE_CTRL + (0x200 * decoder), vscale);
	}		}

	@@ -606,8 +543,8 @@ static void medusa_set_decoderduration(struct cx25821_dev *dev, int decoder,
	}		}

	/* Map to Medusa register setting */		/* Map to Medusa register setting */
	static int mapM(int srcMin,		static int mapM(int srcMin, int srcMax, int srcVal, int dstMin, int dstMax,
	int srcMax, int srcVal, int dstMin, int dstMax, int *dstVal)		int *dstVal)
	{		{
	int numerator;		int numerator;
	int denominator;		int denominator;
	@@ -659,18 +596,14 @@ int medusa_set_brightness(struct cx25821_dev *dev, int brightness, int decoder)
	mutex_unlock(&dev->lock);		mutex_unlock(&dev->lock);
	return -1;		return -1;
	}		}
	ret_val =		ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, brightness,
	mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, brightness,
	SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);		SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
	value = convert_to_twos(value, 8);		value = convert_to_twos(value, 8);
	val =		val = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	VDEC_A_BRITE_CTRL + (0x200 * decoder), &tmp);		VDEC_A_BRITE_CTRL + (0x200 * decoder), &tmp);
	val &= 0xFFFFFF00;		val &= 0xFFFFFF00;
	ret_val \|=		ret_val \|= cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],		VDEC_A_BRITE_CTRL + (0x200 * decoder), val \| value);
	VDEC_A_BRITE_CTRL + (0x200 * decoder),
	val \| value);
	mutex_unlock(&dev->lock);		mutex_unlock(&dev->lock);
	return ret_val;		return ret_val;
	}		}
	@@ -688,17 +621,13 @@ int medusa_set_contrast(struct cx25821_dev *dev, int contrast, int decoder)
	return -1;		return -1;
	}		}

	ret_val =		ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, contrast,
	mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, contrast,
	UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);		UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);
	val =		val = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	VDEC_A_CNTRST_CTRL + (0x200 * decoder), &tmp);		VDEC_A_CNTRST_CTRL + (0x200 * decoder), &tmp);
	val &= 0xFFFFFF00;		val &= 0xFFFFFF00;
	ret_val \|=		ret_val \|= cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],		VDEC_A_CNTRST_CTRL + (0x200 * decoder), val \| value);
	VDEC_A_CNTRST_CTRL + (0x200 * decoder),
	val \| value);

	mutex_unlock(&dev->lock);		mutex_unlock(&dev->lock);
	return ret_val;		return ret_val;
	@@ -717,18 +646,15 @@ int medusa_set_hue(struct cx25821_dev *dev, int hue, int decoder)
	return -1;		return -1;
	}		}

	ret_val =		ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, hue,
	mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, hue, SIGNED_BYTE_MIN,		SIGNED_BYTE_MIN, SIGNED_BYTE_MAX, &value);
	SIGNED_BYTE_MAX, &value);

	value = convert_to_twos(value, 8);		value = convert_to_twos(value, 8);
	val =		val = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	VDEC_A_HUE_CTRL + (0x200 * decoder), &tmp);		VDEC_A_HUE_CTRL + (0x200 * decoder), &tmp);
	val &= 0xFFFFFF00;		val &= 0xFFFFFF00;

	ret_val \|=		ret_val \|= cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],
	VDEC_A_HUE_CTRL + (0x200 * decoder), val \| value);		VDEC_A_HUE_CTRL + (0x200 * decoder), val \| value);

	mutex_unlock(&dev->lock);		mutex_unlock(&dev->lock);
	@@ -749,27 +675,20 @@ int medusa_set_saturation(struct cx25821_dev *dev, int saturation, int decoder)
	return -1;		return -1;
	}		}

	ret_val =		ret_val = mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, saturation,
	mapM(VIDEO_PROCAMP_MIN, VIDEO_PROCAMP_MAX, saturation,
	UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);		UNSIGNED_BYTE_MIN, UNSIGNED_BYTE_MAX, &value);

	val =		val = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	VDEC_A_USAT_CTRL + (0x200 * decoder), &tmp);		VDEC_A_USAT_CTRL + (0x200 * decoder), &tmp);
	val &= 0xFFFFFF00;		val &= 0xFFFFFF00;
	ret_val \|=		ret_val \|= cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],		VDEC_A_USAT_CTRL + (0x200 * decoder), val \| value);
	VDEC_A_USAT_CTRL + (0x200 * decoder),
	val \| value);

	val =		val = cx25821_i2c_read(&dev->i2c_bus[0],
	cx25821_i2c_read(&dev->i2c_bus[0],
	VDEC_A_VSAT_CTRL + (0x200 * decoder), &tmp);		VDEC_A_VSAT_CTRL + (0x200 * decoder), &tmp);
	val &= 0xFFFFFF00;		val &= 0xFFFFFF00;
	ret_val \|=		ret_val \|= cx25821_i2c_write(&dev->i2c_bus[0],
	cx25821_i2c_write(&dev->i2c_bus[0],		VDEC_A_VSAT_CTRL + (0x200 * decoder), val \| value);
	VDEC_A_VSAT_CTRL + (0x200 * decoder),
	val \| value);

	mutex_unlock(&dev->lock);		mutex_unlock(&dev->lock);
	return ret_val;		return ret_val;
	@@ -830,8 +749,7 @@ int medusa_video_init(struct cx25821_dev *dev)
	/* select AFE clock to output mode */		/* select AFE clock to output mode */
	value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp);		value = cx25821_i2c_read(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL, &tmp);
	value &= 0x83FFFFFF;		value &= 0x83FFFFFF;
	ret_val =		ret_val = cx25821_i2c_write(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL,
	cx25821_i2c_write(&dev->i2c_bus[0], AFE_AB_DIAG_CTRL,
	value \| 0x10000000);		value \| 0x10000000);

	if (ret_val < 0)		if (ret_val < 0)