Loading arch/sh/include/asm/bitops-grb.h +3 −0 Original line number Diff line number Diff line Loading @@ -166,4 +166,7 @@ static inline int test_and_change_bit(int nr, volatile void * addr) return retval; } #include <asm-generic/bitops/non-atomic.h> #endif /* __ASM_SH_BITOPS_GRB_H */ arch/sh/include/asm/bitops-irq.hdeleted 100644 → 0 +0 −91 Original line number Diff line number Diff line #ifndef __ASM_SH_BITOPS_IRQ_H #define __ASM_SH_BITOPS_IRQ_H static inline void set_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); *a |= mask; local_irq_restore(flags); } static inline void clear_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); *a &= ~mask; local_irq_restore(flags); } static inline void change_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); *a ^= mask; local_irq_restore(flags); } static inline int test_and_set_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); retval = (mask & *a) != 0; *a |= mask; local_irq_restore(flags); return retval; } static inline int test_and_clear_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); retval = (mask & *a) != 0; *a &= ~mask; local_irq_restore(flags); return retval; } static inline int test_and_change_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); retval = (mask & *a) != 0; *a ^= mask; local_irq_restore(flags); return retval; } #endif /* __ASM_SH_BITOPS_IRQ_H */ arch/sh/include/asm/bitops-llsc.h +2 −0 Original line number Diff line number Diff line Loading @@ -141,4 +141,6 @@ static inline int test_and_change_bit(int nr, volatile void * addr) return retval != 0; } #include <asm-generic/bitops/non-atomic.h> #endif /* __ASM_SH_BITOPS_LLSC_H */ arch/sh/include/asm/bitops.h +2 −4 Original line number Diff line number Diff line Loading @@ -16,18 +16,16 @@ #elif defined(CONFIG_CPU_SH4A) #include <asm/bitops-llsc.h> #else #include <asm/bitops-irq.h> #include <asm-generic/bitops/atomic.h> #include <asm-generic/bitops/non-atomic.h> #endif /* * clear_bit() doesn't provide any barrier for the compiler. */ #define smp_mb__before_clear_bit() barrier() #define smp_mb__after_clear_bit() barrier() #include <asm-generic/bitops/non-atomic.h> #ifdef CONFIG_SUPERH32 static inline unsigned long ffz(unsigned long word) { Loading Loading
arch/sh/include/asm/bitops-grb.h +3 −0 Original line number Diff line number Diff line Loading @@ -166,4 +166,7 @@ static inline int test_and_change_bit(int nr, volatile void * addr) return retval; } #include <asm-generic/bitops/non-atomic.h> #endif /* __ASM_SH_BITOPS_GRB_H */
arch/sh/include/asm/bitops-irq.hdeleted 100644 → 0 +0 −91 Original line number Diff line number Diff line #ifndef __ASM_SH_BITOPS_IRQ_H #define __ASM_SH_BITOPS_IRQ_H static inline void set_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); *a |= mask; local_irq_restore(flags); } static inline void clear_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); *a &= ~mask; local_irq_restore(flags); } static inline void change_bit(int nr, volatile void *addr) { int mask; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); *a ^= mask; local_irq_restore(flags); } static inline int test_and_set_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); retval = (mask & *a) != 0; *a |= mask; local_irq_restore(flags); return retval; } static inline int test_and_clear_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); retval = (mask & *a) != 0; *a &= ~mask; local_irq_restore(flags); return retval; } static inline int test_and_change_bit(int nr, volatile void *addr) { int mask, retval; volatile unsigned int *a = addr; unsigned long flags; a += nr >> 5; mask = 1 << (nr & 0x1f); local_irq_save(flags); retval = (mask & *a) != 0; *a ^= mask; local_irq_restore(flags); return retval; } #endif /* __ASM_SH_BITOPS_IRQ_H */
arch/sh/include/asm/bitops-llsc.h +2 −0 Original line number Diff line number Diff line Loading @@ -141,4 +141,6 @@ static inline int test_and_change_bit(int nr, volatile void * addr) return retval != 0; } #include <asm-generic/bitops/non-atomic.h> #endif /* __ASM_SH_BITOPS_LLSC_H */
arch/sh/include/asm/bitops.h +2 −4 Original line number Diff line number Diff line Loading @@ -16,18 +16,16 @@ #elif defined(CONFIG_CPU_SH4A) #include <asm/bitops-llsc.h> #else #include <asm/bitops-irq.h> #include <asm-generic/bitops/atomic.h> #include <asm-generic/bitops/non-atomic.h> #endif /* * clear_bit() doesn't provide any barrier for the compiler. */ #define smp_mb__before_clear_bit() barrier() #define smp_mb__after_clear_bit() barrier() #include <asm-generic/bitops/non-atomic.h> #ifdef CONFIG_SUPERH32 static inline unsigned long ffz(unsigned long word) { Loading