Loading arch/ia64/kvm/mmio.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -316,8 +316,8 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma) return; return; } else { } else { inst_type = -1; inst_type = -1; panic_vm(vcpu, "Unsupported MMIO access instruction! \ panic_vm(vcpu, "Unsupported MMIO access instruction! " Bunld[0]=0x%lx, Bundle[1]=0x%lx\n", "Bunld[0]=0x%lx, Bundle[1]=0x%lx\n", bundle.i64[0], bundle.i64[1]); bundle.i64[0], bundle.i64[1]); } } Loading arch/ia64/kvm/vcpu.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -1639,8 +1639,8 @@ void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val) * Otherwise panic * Otherwise panic */ */ if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM)) if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM)) panic_vm(vcpu, "Only support guests with vpsr.pk =0 \ panic_vm(vcpu, "Only support guests with vpsr.pk =0 " & vpsr.is=0\n"); "& vpsr.is=0\n"); /* /* * For those IA64_PSR bits: id/da/dd/ss/ed/ia * For those IA64_PSR bits: id/da/dd/ss/ed/ia Loading Loading
arch/ia64/kvm/mmio.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -316,8 +316,8 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma) return; return; } else { } else { inst_type = -1; inst_type = -1; panic_vm(vcpu, "Unsupported MMIO access instruction! \ panic_vm(vcpu, "Unsupported MMIO access instruction! " Bunld[0]=0x%lx, Bundle[1]=0x%lx\n", "Bunld[0]=0x%lx, Bundle[1]=0x%lx\n", bundle.i64[0], bundle.i64[1]); bundle.i64[0], bundle.i64[1]); } } Loading
arch/ia64/kvm/vcpu.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -1639,8 +1639,8 @@ void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val) * Otherwise panic * Otherwise panic */ */ if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM)) if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM)) panic_vm(vcpu, "Only support guests with vpsr.pk =0 \ panic_vm(vcpu, "Only support guests with vpsr.pk =0 " & vpsr.is=0\n"); "& vpsr.is=0\n"); /* /* * For those IA64_PSR bits: id/da/dd/ss/ed/ia * For those IA64_PSR bits: id/da/dd/ss/ed/ia Loading