Commit 18cbbdd8 authored by Phong Hoang's avatar Phong Hoang Committed by Geert Uytterhoeven
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parent dd123dd0
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+50 −0
Original line number Diff line number Diff line
@@ -943,6 +943,56 @@ avb5: ethernet@e6850000 {
			status = "disabled";
		};

		pwm0: pwm@e6e30000 {
			compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
			reg = <0 0xe6e30000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 628>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 628>;
			status = "disabled";
		};

		pwm1: pwm@e6e31000 {
			compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
			reg = <0 0xe6e31000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 628>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 628>;
			status = "disabled";
		};

		pwm2: pwm@e6e32000 {
			compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
			reg = <0 0xe6e32000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 628>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 628>;
			status = "disabled";
		};

		pwm3: pwm@e6e33000 {
			compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
			reg = <0 0xe6e33000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 628>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 628>;
			status = "disabled";
		};

		pwm4: pwm@e6e34000 {
			compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
			reg = <0 0xe6e34000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 628>;
			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
			resets = <&cpg 628>;
			status = "disabled";
		};

		scif0: serial@e6e60000 {
			compatible = "renesas,scif-r8a779a0",
				     "renesas,rcar-gen4-scif", "renesas,scif";