Commit 1c49cbb1 authored by Andrew Davis's avatar Andrew Davis Committed by Nishanth Menon
Browse files

arm64: dts: ti: k3-am65: Enable SPI nodes at the board level 



SPI nodes defined in the top-level AM65x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the SPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.

Signed-off-by: default avatarAndrew Davis <afd@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Tested-by: default avatarJan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: default avatarBryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20221028142417.10642-4-afd@ti.com
parent c0a5ba87

arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -574,6 +574,7 @@ &usb1 { 
};



&mcu_spi0 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&mcu_spi0_pins_default>;

arch/arm64/boot/dts/ti/k3-am65-main.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -217,6 +217,7 @@ main_spi0: spi@2100000 { 
		#size-cells = <0>;

		dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;

		dma-names = "tx0", "rx0";

		status = "disabled";

	};



	main_spi1: spi@2110000 {
@@ -229,6 +230,7 @@ main_spi1: spi@2110000 { 
		#size-cells = <0>;

		assigned-clocks = <&k3_clks 137 1>;

		assigned-clock-rates = <48000000>;

		status = "disabled";

	};



	main_spi2: spi@2120000 {
@@ -239,6 +241,7 @@ main_spi2: spi@2120000 { 
		power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	main_spi3: spi@2130000 {
@@ -249,6 +252,7 @@ main_spi3: spi@2130000 { 
		power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	main_spi4: spi@2140000 {
@@ -259,6 +263,7 @@ main_spi4: spi@2140000 { 
		power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	sdhci0: mmc@4f80000 {

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ mcu_spi0: spi@40300000 { 
		power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	mcu_spi1: spi@40310000 {
@@ -68,6 +69,7 @@ mcu_spi1: spi@40310000 { 
		power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	mcu_spi2: spi@40320000 {
@@ -78,6 +80,7 @@ mcu_spi2: spi@40320000 { 
		power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;

		#address-cells = <1>;

		#size-cells = <0>;

		status = "disabled";

	};



	tscadc0: tscadc@40200000 {

arch/arm64/boot/dts/ti/k3-am654-base-board.dts

+1 −0
Original line number Diff line number Diff line
@@ -342,6 +342,7 @@ &ecap0 { 
};



&main_spi0 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&main_spi0_pins_default>;

	#address-cells = <1>;