Unverified Commit 1cbf6443 authored by Bard Liao's avatar Bard Liao Committed by Mark Brown
Browse files

ASoC: SOF: intel: add sdw_shim/alh_base to sof_intel_dsp_desc 



sdw_shim_base and sdw_alh_base are platform-dependent. This change allow
us to define different sdw shim/alh base for each platform.

Signed-off-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20210723115451.7245-3-yung-chuan.liao@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent f0163958

sound/soc/sof/intel/cnl.c

+4 −0
Original line number Diff line number Diff line
@@ -347,6 +347,8 @@ const struct sof_intel_dsp_desc cnl_chip_info = { 
	.rom_init_timeout	= 300,

	.ssp_count = CNL_SSP_COUNT,

	.ssp_base_offset = CNL_SSP_BASE_OFFSET,

	.sdw_shim_base = SDW_SHIM_BASE,

	.sdw_alh_base = SDW_ALH_BASE,

};

EXPORT_SYMBOL_NS(cnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -363,5 +365,7 @@ const struct sof_intel_dsp_desc jsl_chip_info = { 
	.rom_init_timeout	= 300,

	.ssp_count = ICL_SSP_COUNT,

	.ssp_base_offset = CNL_SSP_BASE_OFFSET,

	.sdw_shim_base = SDW_SHIM_BASE,

	.sdw_alh_base = SDW_ALH_BASE,

};

EXPORT_SYMBOL_NS(jsl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);

sound/soc/sof/intel/icl.c

+2 −0
Original line number Diff line number Diff line
@@ -142,5 +142,7 @@ const struct sof_intel_dsp_desc icl_chip_info = { 
	.rom_init_timeout	= 300,

	.ssp_count = ICL_SSP_COUNT,

	.ssp_base_offset = CNL_SSP_BASE_OFFSET,

	.sdw_shim_base = SDW_SHIM_BASE,

	.sdw_alh_base = SDW_ALH_BASE,

};

EXPORT_SYMBOL_NS(icl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);

sound/soc/sof/intel/shim.h

+2 −0
Original line number Diff line number Diff line
@@ -164,6 +164,8 @@ struct sof_intel_dsp_desc { 
	int rom_init_timeout;

	int ssp_count;			/* ssp count of the platform */

	int ssp_base_offset;		/* base address of the SSPs */

	u32 sdw_shim_base;

	u32 sdw_alh_base;

};



extern const struct snd_sof_dsp_ops sof_tng_ops;

sound/soc/sof/intel/tgl.c

+8 −0
Original line number Diff line number Diff line
@@ -137,6 +137,8 @@ const struct sof_intel_dsp_desc tgl_chip_info = { 
	.rom_init_timeout	= 300,

	.ssp_count = ICL_SSP_COUNT,

	.ssp_base_offset = CNL_SSP_BASE_OFFSET,

	.sdw_shim_base = SDW_SHIM_BASE,

	.sdw_alh_base = SDW_ALH_BASE,

};

EXPORT_SYMBOL_NS(tgl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -153,6 +155,8 @@ const struct sof_intel_dsp_desc tglh_chip_info = { 
	.rom_init_timeout	= 300,

	.ssp_count = ICL_SSP_COUNT,

	.ssp_base_offset = CNL_SSP_BASE_OFFSET,

	.sdw_shim_base = SDW_SHIM_BASE,

	.sdw_alh_base = SDW_ALH_BASE,

};

EXPORT_SYMBOL_NS(tglh_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -169,6 +173,8 @@ const struct sof_intel_dsp_desc ehl_chip_info = { 
	.rom_init_timeout	= 300,

	.ssp_count = ICL_SSP_COUNT,

	.ssp_base_offset = CNL_SSP_BASE_OFFSET,

	.sdw_shim_base = SDW_SHIM_BASE,

	.sdw_alh_base = SDW_ALH_BASE,

};

EXPORT_SYMBOL_NS(ehl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -185,5 +191,7 @@ const struct sof_intel_dsp_desc adls_chip_info = { 
	.rom_init_timeout	= 300,

	.ssp_count = ICL_SSP_COUNT,

	.ssp_base_offset = CNL_SSP_BASE_OFFSET,

	.sdw_shim_base = SDW_SHIM_BASE,

	.sdw_alh_base = SDW_ALH_BASE,

};

EXPORT_SYMBOL_NS(adls_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);