Loading arch/sh/kernel/cpu/clock.c +25 −2 Original line number Diff line number Diff line Loading @@ -5,9 +5,11 @@ * * This clock framework is derived from the OMAP version by: * * Copyright (C) 2004 Nokia Corporation * Copyright (C) 2004 - 2005 Nokia Corporation * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> * * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. Loading @@ -20,6 +22,7 @@ #include <linux/kref.h> #include <linux/seq_file.h> #include <linux/err.h> #include <linux/platform_device.h> #include <asm/clock.h> #include <asm/timer.h> Loading Loading @@ -195,17 +198,37 @@ void clk_recalc_rate(struct clk *clk) propagate_rate(clk); } struct clk *clk_get(const char *id) /* * Returns a clock. Note that we first try to use device id on the bus * and clock name. If this fails, we try to use clock name only. */ struct clk *clk_get(struct device *dev, const char *id) { struct clk *p, *clk = ERR_PTR(-ENOENT); int idno; if (dev == NULL || dev->bus != &platform_bus_type) idno = -1; else idno = to_platform_device(dev)->id; mutex_lock(&clock_list_sem); list_for_each_entry(p, &clock_list, node) { if (p->id == idno && strcmp(id, p->name) == 0 && try_module_get(p->owner)) { clk = p; goto found; } } list_for_each_entry(p, &clock_list, node) { if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { clk = p; break; } } found: mutex_unlock(&clock_list_sem); return clk; Loading arch/sh/kernel/cpu/sh3/clock-sh7709.c +1 −1 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; static void set_bus_parent(struct clk *clk) { struct clk *bus_clk = clk_get("bus_clk"); struct clk *bus_clk = clk_get(NULL, "bus_clk"); clk->parent = bus_clk; clk_put(bus_clk); } Loading arch/sh/kernel/cpu/sh4/clock-sh4-202.c +2 −2 Original line number Diff line number Diff line Loading @@ -97,7 +97,7 @@ static void shoc_clk_recalc(struct clk *clk) static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) { struct clk *bclk = clk_get("bus_clk"); struct clk *bclk = clk_get(NULL, "bus_clk"); unsigned long bclk_rate = clk_get_rate(bclk); clk_put(bclk); Loading Loading @@ -151,7 +151,7 @@ static struct clk *sh4202_onchip_clocks[] = { static int __init sh4202_clk_init(void) { struct clk *clk = clk_get("master_clk"); struct clk *clk = clk_get(NULL, "master_clk"); int i; for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) { Loading arch/sh/kernel/cpu/sh4/clock-sh7780.c +1 −1 Original line number Diff line number Diff line Loading @@ -98,7 +98,7 @@ static struct clk *sh7780_onchip_clocks[] = { static int __init sh7780_clk_init(void) { struct clk *clk = clk_get("master_clk"); struct clk *clk = clk_get(NULL, "master_clk"); int i; for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) { Loading arch/sh/kernel/timers/timer-cmt.c +2 −2 Original line number Diff line number Diff line Loading @@ -124,7 +124,7 @@ static void cmt_clk_init(struct clk *clk) u8 divisor = CMT_CMCSR_INIT & 0x3; ctrl_inw(CMT_CMCSR_0); ctrl_outw(CMT_CMCSR_INIT, CMT_CMCSR_0); clk->parent = clk_get("module_clk"); clk->parent = clk_get(NULL, "module_clk"); clk->rate = clk->parent->rate / (8 << (divisor << 1)); } Loading Loading @@ -164,7 +164,7 @@ static int cmt_timer_init(void) setup_irq(CONFIG_SH_TIMER_IRQ, &cmt_irq); cmt0_clk.parent = clk_get("module_clk"); cmt0_clk.parent = clk_get(NULL, "module_clk"); cmt_timer_stop(); Loading Loading
arch/sh/kernel/cpu/clock.c +25 −2 Original line number Diff line number Diff line Loading @@ -5,9 +5,11 @@ * * This clock framework is derived from the OMAP version by: * * Copyright (C) 2004 Nokia Corporation * Copyright (C) 2004 - 2005 Nokia Corporation * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> * * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. Loading @@ -20,6 +22,7 @@ #include <linux/kref.h> #include <linux/seq_file.h> #include <linux/err.h> #include <linux/platform_device.h> #include <asm/clock.h> #include <asm/timer.h> Loading Loading @@ -195,17 +198,37 @@ void clk_recalc_rate(struct clk *clk) propagate_rate(clk); } struct clk *clk_get(const char *id) /* * Returns a clock. Note that we first try to use device id on the bus * and clock name. If this fails, we try to use clock name only. */ struct clk *clk_get(struct device *dev, const char *id) { struct clk *p, *clk = ERR_PTR(-ENOENT); int idno; if (dev == NULL || dev->bus != &platform_bus_type) idno = -1; else idno = to_platform_device(dev)->id; mutex_lock(&clock_list_sem); list_for_each_entry(p, &clock_list, node) { if (p->id == idno && strcmp(id, p->name) == 0 && try_module_get(p->owner)) { clk = p; goto found; } } list_for_each_entry(p, &clock_list, node) { if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { clk = p; break; } } found: mutex_unlock(&clock_list_sem); return clk; Loading
arch/sh/kernel/cpu/sh3/clock-sh7709.c +1 −1 Original line number Diff line number Diff line Loading @@ -24,7 +24,7 @@ static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 }; static void set_bus_parent(struct clk *clk) { struct clk *bus_clk = clk_get("bus_clk"); struct clk *bus_clk = clk_get(NULL, "bus_clk"); clk->parent = bus_clk; clk_put(bus_clk); } Loading
arch/sh/kernel/cpu/sh4/clock-sh4-202.c +2 −2 Original line number Diff line number Diff line Loading @@ -97,7 +97,7 @@ static void shoc_clk_recalc(struct clk *clk) static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) { struct clk *bclk = clk_get("bus_clk"); struct clk *bclk = clk_get(NULL, "bus_clk"); unsigned long bclk_rate = clk_get_rate(bclk); clk_put(bclk); Loading Loading @@ -151,7 +151,7 @@ static struct clk *sh4202_onchip_clocks[] = { static int __init sh4202_clk_init(void) { struct clk *clk = clk_get("master_clk"); struct clk *clk = clk_get(NULL, "master_clk"); int i; for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) { Loading
arch/sh/kernel/cpu/sh4/clock-sh7780.c +1 −1 Original line number Diff line number Diff line Loading @@ -98,7 +98,7 @@ static struct clk *sh7780_onchip_clocks[] = { static int __init sh7780_clk_init(void) { struct clk *clk = clk_get("master_clk"); struct clk *clk = clk_get(NULL, "master_clk"); int i; for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) { Loading
arch/sh/kernel/timers/timer-cmt.c +2 −2 Original line number Diff line number Diff line Loading @@ -124,7 +124,7 @@ static void cmt_clk_init(struct clk *clk) u8 divisor = CMT_CMCSR_INIT & 0x3; ctrl_inw(CMT_CMCSR_0); ctrl_outw(CMT_CMCSR_INIT, CMT_CMCSR_0); clk->parent = clk_get("module_clk"); clk->parent = clk_get(NULL, "module_clk"); clk->rate = clk->parent->rate / (8 << (divisor << 1)); } Loading Loading @@ -164,7 +164,7 @@ static int cmt_timer_init(void) setup_irq(CONFIG_SH_TIMER_IRQ, &cmt_irq); cmt0_clk.parent = clk_get("module_clk"); cmt0_clk.parent = clk_get(NULL, "module_clk"); cmt_timer_stop(); Loading