Commit 1e35e3fc authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: simplify DPU_SSPP features checks



Add DPU_SSPP_CSC_ANY denoting any CSC block. As we are at it, rewrite
DPU_SSPP_SCALER (any scaler) to use BIT(x) instead of hand-coded
bitshifts.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Link: https://lore.kernel.org/r/20211201225140.2481577-4-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent a67f2cc6
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+11 −5
Original line number Diff line number Diff line
@@ -25,11 +25,17 @@ struct dpu_hw_pipe;
/**
 * Define all scaler feature bits in catalog
 */
#define DPU_SSPP_SCALER ((1UL << DPU_SSPP_SCALER_RGB) | \
	(1UL << DPU_SSPP_SCALER_QSEED2) | \
	 (1UL << DPU_SSPP_SCALER_QSEED3) | \
	 (1UL << DPU_SSPP_SCALER_QSEED3LITE) | \
	  (1UL << DPU_SSPP_SCALER_QSEED4))
#define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \
			 BIT(DPU_SSPP_SCALER_QSEED2) | \
			 BIT(DPU_SSPP_SCALER_QSEED3) | \
			 BIT(DPU_SSPP_SCALER_QSEED3LITE) | \
			 BIT(DPU_SSPP_SCALER_QSEED4))

/*
 * Define all CSC feature bits in catalog
 */
#define DPU_SSPP_CSC_ANY (BIT(DPU_SSPP_CSC) | \
			  BIT(DPU_SSPP_CSC_10BIT))

/**
 * Component indices
+1 −2
Original line number Diff line number Diff line
@@ -1010,8 +1010,7 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,

	if (DPU_FORMAT_IS_YUV(fmt) &&
		(!(pdpu->pipe_hw->cap->features & DPU_SSPP_SCALER) ||
		 !(pdpu->pipe_hw->cap->features & (BIT(DPU_SSPP_CSC)
		 | BIT(DPU_SSPP_CSC_10BIT))))) {
		 !(pdpu->pipe_hw->cap->features & DPU_SSPP_CSC_ANY))) {
		DPU_DEBUG_PLANE(pdpu,
				"plane doesn't have scaler/csc for yuv\n");
		return -EINVAL;