Loading drivers/spi/spi-microchip-core.c +20 −36 Original line number Diff line number Diff line Loading @@ -513,7 +513,7 @@ static int mchp_corespi_probe(struct platform_device *pdev) u32 num_cs; int ret = 0; master = spi_alloc_master(&pdev->dev, sizeof(*spi)); master = devm_spi_alloc_master(&pdev->dev, sizeof(*spi)); if (!master) return dev_err_probe(&pdev->dev, -ENOMEM, "unable to allocate master for SPI controller\n"); Loading @@ -535,58 +535,44 @@ static int mchp_corespi_probe(struct platform_device *pdev) spi = spi_master_get_devdata(master); spi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(spi->regs)) { ret = PTR_ERR(spi->regs); goto error_release_master; } if (IS_ERR(spi->regs)) return PTR_ERR(spi->regs); spi->irq = platform_get_irq(pdev, 0); if (spi->irq <= 0) { dev_err(&pdev->dev, "invalid IRQ %d for SPI controller\n", spi->irq); ret = -ENXIO; goto error_release_master; } if (spi->irq <= 0) return dev_err_probe(&pdev->dev, -ENXIO, "invalid IRQ %d for SPI controller\n", spi->irq); ret = devm_request_irq(&pdev->dev, spi->irq, mchp_corespi_interrupt, IRQF_SHARED, dev_name(&pdev->dev), master); if (ret) { dev_err(&pdev->dev, "could not request irq: %d\n", ret); goto error_release_master; } if (ret) return dev_err_probe(&pdev->dev, ret, "could not request irq: %d\n", ret); spi->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(spi->clk)) { ret = PTR_ERR(spi->clk); dev_err(&pdev->dev, "could not get clk: %d\n", ret); goto error_release_master; } if (IS_ERR(spi->clk)) return dev_err_probe(&pdev->dev, PTR_ERR(spi->clk), "could not get clk: %d\n", ret); ret = clk_prepare_enable(spi->clk); if (ret) { dev_err(&pdev->dev, "failed to enable clock\n"); goto error_release_master; } if (ret) return dev_err_probe(&pdev->dev, ret, "failed to enable clock\n"); mchp_corespi_init(master, spi); ret = devm_spi_register_master(&pdev->dev, master); if (ret) { dev_err(&pdev->dev, mchp_corespi_disable(spi); clk_disable_unprepare(spi->clk); return dev_err_probe(&pdev->dev, ret, "unable to register master for SPI controller\n"); goto error_release_hardware; } dev_info(&pdev->dev, "Registered SPI controller %d\n", master->bus_num); return 0; error_release_hardware: mchp_corespi_disable(spi); clk_disable_unprepare(spi->clk); error_release_master: spi_master_put(master); return ret; } static int mchp_corespi_remove(struct platform_device *pdev) Loading @@ -595,8 +581,6 @@ static int mchp_corespi_remove(struct platform_device *pdev) struct mchp_corespi *spi = spi_master_get_devdata(master); mchp_corespi_disable_ints(spi); spi_unregister_master(master); spi_master_put(master); clk_disable_unprepare(spi->clk); mchp_corespi_disable(spi); Loading Loading
drivers/spi/spi-microchip-core.c +20 −36 Original line number Diff line number Diff line Loading @@ -513,7 +513,7 @@ static int mchp_corespi_probe(struct platform_device *pdev) u32 num_cs; int ret = 0; master = spi_alloc_master(&pdev->dev, sizeof(*spi)); master = devm_spi_alloc_master(&pdev->dev, sizeof(*spi)); if (!master) return dev_err_probe(&pdev->dev, -ENOMEM, "unable to allocate master for SPI controller\n"); Loading @@ -535,58 +535,44 @@ static int mchp_corespi_probe(struct platform_device *pdev) spi = spi_master_get_devdata(master); spi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(spi->regs)) { ret = PTR_ERR(spi->regs); goto error_release_master; } if (IS_ERR(spi->regs)) return PTR_ERR(spi->regs); spi->irq = platform_get_irq(pdev, 0); if (spi->irq <= 0) { dev_err(&pdev->dev, "invalid IRQ %d for SPI controller\n", spi->irq); ret = -ENXIO; goto error_release_master; } if (spi->irq <= 0) return dev_err_probe(&pdev->dev, -ENXIO, "invalid IRQ %d for SPI controller\n", spi->irq); ret = devm_request_irq(&pdev->dev, spi->irq, mchp_corespi_interrupt, IRQF_SHARED, dev_name(&pdev->dev), master); if (ret) { dev_err(&pdev->dev, "could not request irq: %d\n", ret); goto error_release_master; } if (ret) return dev_err_probe(&pdev->dev, ret, "could not request irq: %d\n", ret); spi->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(spi->clk)) { ret = PTR_ERR(spi->clk); dev_err(&pdev->dev, "could not get clk: %d\n", ret); goto error_release_master; } if (IS_ERR(spi->clk)) return dev_err_probe(&pdev->dev, PTR_ERR(spi->clk), "could not get clk: %d\n", ret); ret = clk_prepare_enable(spi->clk); if (ret) { dev_err(&pdev->dev, "failed to enable clock\n"); goto error_release_master; } if (ret) return dev_err_probe(&pdev->dev, ret, "failed to enable clock\n"); mchp_corespi_init(master, spi); ret = devm_spi_register_master(&pdev->dev, master); if (ret) { dev_err(&pdev->dev, mchp_corespi_disable(spi); clk_disable_unprepare(spi->clk); return dev_err_probe(&pdev->dev, ret, "unable to register master for SPI controller\n"); goto error_release_hardware; } dev_info(&pdev->dev, "Registered SPI controller %d\n", master->bus_num); return 0; error_release_hardware: mchp_corespi_disable(spi); clk_disable_unprepare(spi->clk); error_release_master: spi_master_put(master); return ret; } static int mchp_corespi_remove(struct platform_device *pdev) Loading @@ -595,8 +581,6 @@ static int mchp_corespi_remove(struct platform_device *pdev) struct mchp_corespi *spi = spi_master_get_devdata(master); mchp_corespi_disable_ints(spi); spi_unregister_master(master); spi_master_put(master); clk_disable_unprepare(spi->clk); mchp_corespi_disable(spi); Loading