Loading drivers/gpu/drm/nouveau/nv50_sor.c +16 −2 Original line number Diff line number Diff line Loading @@ -115,8 +115,22 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode) nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or))); } if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON) if (nv_encoder->dcb->type == OUTPUT_DP) { struct nouveau_i2c_chan *auxch; auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index); if (!auxch) return; if (mode == DRM_MODE_DPMS_ON) { u8 status = DP_SET_POWER_D0; nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1); nouveau_dp_link_train(encoder); } else { u8 status = DP_SET_POWER_D3; nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1); } } } static void Loading Loading
drivers/gpu/drm/nouveau/nv50_sor.c +16 −2 Original line number Diff line number Diff line Loading @@ -115,8 +115,22 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode) nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or))); } if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON) if (nv_encoder->dcb->type == OUTPUT_DP) { struct nouveau_i2c_chan *auxch; auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index); if (!auxch) return; if (mode == DRM_MODE_DPMS_ON) { u8 status = DP_SET_POWER_D0; nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1); nouveau_dp_link_train(encoder); } else { u8 status = DP_SET_POWER_D3; nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1); } } } static void Loading