Commit 20bedf13 authored by Le Ma's avatar Le Ma Committed by Alex Deucher
Browse files

drm/amdgpu: introduce new doorbell assignment table for GC 9.4.3 



Four basic reasons as below to do the change:
  1. number of ring expand a lot on GC 9.4.3, and adjustment on old
     assignment cannot make each ring in a continuous doorbell space.
  2. the SDMA doorbell index should not exceed 0x1FF on SDMA 4.2.2 due to
     regDOORBELLx_CTRL_ENTRY.BIF_DOORBELLx_RANGE_OFFSET_ENTRY field width.
  3. re-design the doorbell assignment and unify the calculation as
     "start + ring/inst id" will make the code much concise.
  4. only defining the START/END makes the table look simple

v2: (Lijo)
  1. replace name
  2. use num_inst_per_aid/sdma_doorbell_range instead of hardcoding

Signed-off-by: default avatarLe Ma <le.ma@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 36be0181

drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h

+28 −4
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@ struct amdgpu_doorbell_index { 
	uint32_t gfx_ring1;

	uint32_t gfx_userqueue_start;

	uint32_t gfx_userqueue_end;

	uint32_t sdma_engine[8];

	uint32_t sdma_engine[16];

	uint32_t mes_ring0;

	uint32_t mes_ring1;

	uint32_t ih;
@@ -83,9 +83,6 @@ struct amdgpu_doorbell_index { 
	};

	uint32_t first_non_cp;

	uint32_t last_non_cp;

	uint32_t xcc1_kiq_start;

	uint32_t xcc1_mec_ring0_start;

	uint32_t aid1_sdma_start;

	uint32_t max_assignment;

	/* Per engine SDMA doorbell size in dword */

	uint32_t sdma_doorbell_range;
@@ -312,6 +309,33 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT 
	AMDGPU_DOORBELL64_INVALID                 = 0xFFFF

} AMDGPU_DOORBELL64_ASSIGNMENT;



typedef enum _AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1

{

	/* KIQ: 0~7 for maximum 8 XCD */

	AMDGPU_DOORBELL_LAYOUT1_KIQ_START               = 0x000,

	AMDGPU_DOORBELL_LAYOUT1_HIQ                     = 0x008,

	AMDGPU_DOORBELL_LAYOUT1_DIQ                     = 0x009,

	/* Compute: 0x0A ~ 0x49 */

	AMDGPU_DOORBELL_LAYOUT1_MEC_RING_START          = 0x00A,

	AMDGPU_DOORBELL_LAYOUT1_MEC_RING_END            = 0x049,

	AMDGPU_DOORBELL_LAYOUT1_USERQUEUE_START         = 0x04A,

	AMDGPU_DOORBELL_LAYOUT1_USERQUEUE_END           = 0x0C9,

	/* SDMA: 0x100 ~ 0x19F */

	AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_START       = 0x100,

	AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_END         = 0x19F,

	/* IH: 0x1A0 ~ 0x1AF */

	AMDGPU_DOORBELL_LAYOUT1_IH                      = 0x1A0,

	/* VCN: 0x1B0 ~ 0x1C2 */

	AMDGPU_DOORBELL_LAYOUT1_VCN_START               = 0x1B0,

	AMDGPU_DOORBELL_LAYOUT1_VCN_END                 = 0x1C2,



	AMDGPU_DOORBELL_LAYOUT1_FIRST_NON_CP            = AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_START,

	AMDGPU_DOORBELL_LAYOUT1_LAST_NON_CP             = AMDGPU_DOORBELL_LAYOUT1_VCN_END,



	AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT          = 0x1C2,

	AMDGPU_DOORBELL_LAYOUT1_INVALID                 = 0xFFFF

} AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1;



u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index);

void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);

u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index);

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+1 −5
Original line number Diff line number Diff line
@@ -315,11 +315,7 @@ int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, 
	ring->use_doorbell = true;

	ring->xcc_id = xcc_id;

	ring->vm_hub = AMDGPU_GFXHUB(xcc_id);

	if (xcc_id >= 1)

		ring->doorbell_index = (adev->doorbell_index.xcc1_kiq_start +

					xcc_id - 1) << 1;

	else

		ring->doorbell_index = adev->doorbell_index.kiq << 1;

	ring->doorbell_index = (adev->doorbell_index.kiq + xcc_id) << 1;



	r = amdgpu_gfx_kiq_acquire(adev, ring, xcc_id);

	if (r)

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

+1 −7
Original line number Diff line number Diff line
@@ -817,13 +817,7 @@ static int gfx_v9_4_3_compute_ring_init(struct amdgpu_device *adev, int ring_id, 


	ring->ring_obj = NULL;

	ring->use_doorbell = true;

	if (xcc_id >= 1)

		ring->doorbell_index =

				(adev->doorbell_index.xcc1_mec_ring0_start +

				ring_id - adev->gfx.num_compute_rings) << 1;

	else

		ring->doorbell_index =

				(adev->doorbell_index.mec_ring0 + ring_id) << 1;

	ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1;

	ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr

				+ (ring_id * GFX9_MEC_HPD_SIZE);

	ring->vm_hub = AMDGPU_GFXHUB(xcc_id);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

+3 −16
Original line number Diff line number Diff line
@@ -1310,14 +1310,7 @@ static int sdma_v4_4_2_sw_init(void *handle) 
				ring->use_doorbell?"true":"false");



		/* doorbell size is 2 dwords, get DWORD offset */

		if (aid_id > 0)

			ring->doorbell_index =

				(adev->doorbell_index.aid1_sdma_start << 1)

				+ adev->doorbell_index.sdma_doorbell_range

				* (i - adev->sdma.num_inst_per_aid);

		else

			ring->doorbell_index =

				adev->doorbell_index.sdma_engine[i] << 1;

		ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1;

		ring->vm_hub = AMDGPU_MMHUB0(aid_id);



		sprintf(ring->name, "sdma%d.%d", aid_id,
@@ -1336,12 +1329,6 @@ static int sdma_v4_4_2_sw_init(void *handle) 
			/* doorbell index of page queue is assigned right after

			 * gfx queue on the same instance

			 */

			if (aid_id > 0)

				ring->doorbell_index =

					((adev->doorbell_index.aid1_sdma_start + 1) << 1)

					+ adev->doorbell_index.sdma_doorbell_range

					* (i - adev->sdma.num_inst_per_aid);

			else

			ring->doorbell_index =

				(adev->doorbell_index.sdma_engine[i] + 1) << 1;

			ring->vm_hub = AMDGPU_MMHUB0(aid_id);