Commit 23c64447 authored by 周琰杰 (Zhou Yanjie)'s avatar 周琰杰 (Zhou Yanjie) Committed by Thomas Bogendoerfer
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MIPS: CI20: Reduce clocksource to 750 kHz. 



The original clock (3 MHz) is too fast for the clocksource,
there will be a chance that the system may get stuck.

Reported-by: default avatarNikolaus Schaller <hns@goldelico.com>
Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20
Signed-off-by: default avatar周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: default avatarPaul Cercueil <paul@crapouillou.net>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent ab3040e1

arch/mips/boot/dts/ingenic/ci20.dts

+2 −2
Original line number Diff line number Diff line
@@ -525,10 +525,10 @@ pins_mmc1: mmc1 { 


&tcu {

	/*

	 * 750 kHz for the system timer and 3 MHz for the clocksource,

	 * 750 kHz for the system timer and clocksource,

	 * use channel #0 for the system timer, #1 for the clocksource.

	 */

	assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,

					  <&tcu TCU_CLK_OST>;

	assigned-clock-rates = <750000>, <3000000>, <3000000>;

	assigned-clock-rates = <750000>, <750000>, <3000000>;

};