Commit 23fbee9d authored by Ralf Baechle's avatar Ralf Baechle
Browse files

Support for Toshiba's RBHMA4500 eval board for the TX4938. 



Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 13294040

arch/mips/Kconfig

+19 −0
Original line number Diff line number Diff line
@@ -695,6 +695,24 @@ config SOC_AU1500 
config SOC_AU1550

	bool "SOC_AU1550"



config TOSHIBA_RBTX4938

	bool "Support for Toshiba RBTX4938 board"

	select HAVE_STD_PC_SERIAL_PORT

	select DMA_NONCOHERENT

	select GENERIC_ISA_DMA

	select HAS_TXX9_SERIAL

	select HW_HAS_PCI

	select I8259

	select ISA

	select SWAP_IO_SPACE

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_BIG_ENDIAN

	select TOSHIBA_BOARDS

	help

	  This Toshiba board is based on the TX4938 processor. Say Y here to

	  support this machine type



endchoice



choice
@@ -837,6 +855,7 @@ config TOSHIBA_FPCIB0 


source "arch/mips/sgi-ip27/Kconfig"

source "arch/mips/sibyte/Kconfig"

source "arch/mips/tx4938/Kconfig"

source "arch/mips/philips/pnx8550/common/Kconfig"



config RWSEM_GENERIC_SPINLOCK

arch/mips/Makefile

+7 −0
Original line number Diff line number Diff line
@@ -690,6 +690,13 @@ core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/ 
core-$(CONFIG_TOSHIBA_RBTX4927)	+= arch/mips/tx4927/common/

load-$(CONFIG_TOSHIBA_RBTX4927)	+= 0xffffffff80020000



#

# Toshiba RBTX4938 board

#

core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/

core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/

load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000



cflags-y			+= -Iinclude/asm-mips/mach-generic

drivers-$(CONFIG_PCI)		+= arch/mips/pci/

arch/mips/pci/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -52,5 +52,6 @@ obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o 
obj-$(CONFIG_TANBAC_TB0287)	+= fixup-tb0287.o

obj-$(CONFIG_TOSHIBA_JMR3927)	+= fixup-jmr3927.o pci-jmr3927.o

obj-$(CONFIG_TOSHIBA_RBTX4927)	+= fixup-rbtx4927.o ops-tx4927.o

obj-$(CONFIG_TOSHIBA_RBTX4938)	+= fixup-tx4938.o ops-tx4938.o

obj-$(CONFIG_VICTOR_MPC30X)	+= fixup-mpc30x.o

obj-$(CONFIG_ZAO_CAPCELLA)	+= fixup-capcella.o

arch/mips/pci/fixup-tx4938.c

0 → 100644
+92 −0
Original line number Diff line number Diff line 
/*

 * Toshiba rbtx4938 pci routines

 * Copyright (C) 2000-2001 Toshiba Corporation

 *

 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the

 * terms of the GNU General Public License version 2. This program is

 * licensed "as is" without any warranty of any kind, whether express

 * or implied.

 *

 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)

 */

#include <linux/types.h>

#include <linux/pci.h>

#include <linux/kernel.h>

#include <linux/init.h>



#include <asm/tx4938/rbtx4938.h>



extern struct pci_controller tx4938_pci_controller[];



int pci_get_irq(struct pci_dev *dev, int pin)

{

	int irq = pin;

	u8 slot = PCI_SLOT(dev->devfn);

	struct pci_controller *controller = (struct pci_controller *)dev->sysdata;



	if (controller == &tx4938_pci_controller[1]) {

		/* TX4938 PCIC1 */

		switch (slot) {

		case TX4938_PCIC_IDSEL_AD_TO_SLOT(31):

			if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH0_SEL)

				return RBTX4938_IRQ_IRC + TX4938_IR_ETH0;

			break;

		case TX4938_PCIC_IDSEL_AD_TO_SLOT(30):

			if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH1_SEL)

				return RBTX4938_IRQ_IRC + TX4938_IR_ETH1;

			break;

		}

		return 0;

	}



	/* IRQ rotation */

	irq--;	/* 0-3 */

	if (dev->bus->parent == NULL &&

	    (slot == TX4938_PCIC_IDSEL_AD_TO_SLOT(23))) {

		/* PCI CardSlot (IDSEL=A23) */

		/* PCIA => PCIA (IDSEL=A23) */

		irq = (irq + 0 + slot) % 4;

	} else {

		/* PCI Backplane */

		irq = (irq + 33 - slot) % 4;

	}

	irq++;	/* 1-4 */



	switch (irq) {

	case 1:

		irq = RBTX4938_IRQ_IOC_PCIA;

		break;

	case 2:

		irq = RBTX4938_IRQ_IOC_PCIB;

		break;

	case 3:

		irq = RBTX4938_IRQ_IOC_PCIC;

		break;

	case 4:

		irq = RBTX4938_IRQ_IOC_PCID;

		break;

	}

	return irq;

}



int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)

{

	unsigned char irq = 0;



	irq = pci_get_irq(dev, pin);



	printk(KERN_INFO "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",

	       dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),

	       PCI_FUNC(dev->devfn), irq);



	return irq;

}



/*

 * Do platform specific device initialization at pci_enable_device() time

 */

int pcibios_plat_dev_init(struct pci_dev *dev)

{

	return 0;

}

arch/mips/pci/ops-tx4938.c

0 → 100644
+198 −0
Original line number Diff line number Diff line 
/*

 * Define the pci_ops for the Toshiba rbtx4938

 * Copyright (C) 2000-2001 Toshiba Corporation

 *

 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the

 * terms of the GNU General Public License version 2. This program is

 * licensed "as is" without any warranty of any kind, whether express

 * or implied.

 *

 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)

 */

#include <linux/types.h>

#include <linux/pci.h>

#include <linux/kernel.h>

#include <linux/init.h>



#include <asm/addrspace.h>

#include <asm/tx4938/rbtx4938.h>



/* initialize in setup */

struct resource pci_io_resource = {

	.name	= "pci IO space",

	.start	= 0,

	.end	= 0,

	.flags	= IORESOURCE_IO

};



/* initialize in setup */

struct resource pci_mem_resource = {

	.name	= "pci memory space",

	.start	= 0,

	.end	= 0,

	.flags	= IORESOURCE_MEM

};



struct resource tx4938_pcic1_pci_io_resource = {

       	.name	= "PCI1 IO",

       	.start	= 0,

       	.end	= 0,

       	.flags	= IORESOURCE_IO

};

struct resource tx4938_pcic1_pci_mem_resource = {

       	.name	= "PCI1 mem",

       	.start	= 0,

       	.end	= 0,

       	.flags	= IORESOURCE_MEM

};



static int mkaddr(int bus, int dev_fn, int where, int *flagsp)

{

	if (bus > 0) {

		/* Type 1 configuration */

		tx4938_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |

		    ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;

	} else {

		if (dev_fn >= PCI_DEVFN(TX4938_PCIC_MAX_DEVNU, 0))

			return -1;



		/* Type 0 configuration */

		tx4938_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |

		    ((dev_fn & 0xff) << 0x08) | (where & 0xfc);

	}

	/* clear M_ABORT and Disable M_ABORT Int. */

	tx4938_pcicptr->pcistatus =

	    (tx4938_pcicptr->pcistatus & 0x0000ffff) |

	    (PCI_STATUS_REC_MASTER_ABORT << 16);

	tx4938_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;



	return 0;

}



static int check_abort(int flags)

{

	int code = PCIBIOS_SUCCESSFUL;

	/* wait write cycle completion before checking error status */

	while (tx4938_pcicptr->pcicstatus & TX4938_PCIC_PCICSTATUS_IWB)

				;

	if (tx4938_pcicptr->pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {

		tx4938_pcicptr->pcistatus =

		    (tx4938_pcicptr->

		     pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT

						<< 16);

		tx4938_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;

		code = PCIBIOS_DEVICE_NOT_FOUND;

	}

	return code;

}



static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,

					int where, int size, u32 * val)

{

	int flags, retval, dev, busno, func;



	dev = PCI_SLOT(devfn);

	func = PCI_FUNC(devfn);



	/* check if the bus is top-level */

	if (bus->parent != NULL)

		busno = bus->number;

	else {

		busno = 0;

	}



	if (mkaddr(busno, devfn, where, &flags))

		return -1;



	switch (size) {

	case 1:

		*val = *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |

#ifdef __BIG_ENDIAN

			      ((where & 3) ^ 3));

#else

			      (where & 3));

#endif

		break;

	case 2:

		*val = *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |

#ifdef __BIG_ENDIAN

				((where & 3) ^ 2));

#else

				(where & 3));

#endif

		break;

	case 4:

		*val = tx4938_pcicptr->g2pcfgdata;

		break;

	}



	retval = check_abort(flags);

	if (retval == PCIBIOS_DEVICE_NOT_FOUND)

		*val = 0xffffffff;



	return retval;

}



static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,

						int size, u32 val)

{

	int flags, dev, busno, func;



	busno = bus->number;

	dev = PCI_SLOT(devfn);

	func = PCI_FUNC(devfn);



	/* check if the bus is top-level */

	if (bus->parent != NULL) {

		busno = bus->number;

	} else {

		busno = 0;

	}



	if (mkaddr(busno, devfn, where, &flags))

		return -1;



	switch (size) {

	case 1:

		*(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |

#ifdef __BIG_ENDIAN

			  ((where & 3) ^ 3)) = val;

#else

			  (where & 3)) = val;

#endif

		break;

	case 2:

		*(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |

#ifdef __BIG_ENDIAN

			((where & 0x3) ^ 0x2)) = val;

#else

			(where & 3)) = val;

#endif

		break;

	case 4:

		tx4938_pcicptr->g2pcfgdata = val;

		break;

	}



	return check_abort(flags);

}



struct pci_ops tx4938_pci_ops = {

	tx4938_pcibios_read_config,

	tx4938_pcibios_write_config

};



struct pci_controller tx4938_pci_controller[] = {

	/* h/w only supports devices 0x00 to 0x14 */

	{

		.pci_ops        = &tx4938_pci_ops,

		.io_resource    = &pci_io_resource,

		.mem_resource   = &pci_mem_resource,

	},

	/* h/w only supports devices 0x00 to 0x14 */

	{

		.pci_ops        = &tx4938_pci_ops,

		.io_resource    = &tx4938_pcic1_pci_io_resource,

		.mem_resource   = &tx4938_pcic1_pci_mem_resource,

        }

};