Commit 2408ab5a authored by Jagan Teki's avatar Jagan Teki Committed by Heiko Stuebner
Browse files

clk: rockchip: Add clock controller support for RV1126 SoC 

Clock & Reset Unit (CRU) in RV1126 support clocks for CRU
and CRU_PMU blocks.

This patch is trying to add minimal Clock-Architecture Diagram's
inferred from [1] authored by Finley Xiao.

[1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/clk/rockchip/clk-rv1126.c



Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarFinley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: default avatarJagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20220915163947.1922183-5-jagan@edgeble.ai


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent a1f65e64

drivers/clk/rockchip/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -23,6 +23,13 @@ config CLK_RV110X 
	help

	  Build the driver for RV110x Clock Driver.



config CLK_RV1126

	bool "Rockchip RV1126 clock controller support"

	depends on ARM || COMPILE_TEST

	default y

	help

	  Build the driver for RV1126 Clock Driver.



config CLK_RK3036

	bool "Rockchip RK3036 clock controller support"

	depends on ARM || COMPILE_TEST

drivers/clk/rockchip/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ clk-rockchip-$(CONFIG_RESET_CONTROLLER) += softrst.o 


obj-$(CONFIG_CLK_PX30)          += clk-px30.o

obj-$(CONFIG_CLK_RV110X)        += clk-rv1108.o

obj-$(CONFIG_CLK_RV1126)        += clk-rv1126.o

obj-$(CONFIG_CLK_RK3036)        += clk-rk3036.o

obj-$(CONFIG_CLK_RK312X)        += clk-rk3128.o

obj-$(CONFIG_CLK_RK3188)        += clk-rk3188.o

drivers/clk/rockchip/clk-rv1126.c

0 → 100644
+1138 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/clk/rockchip/clk.h

+19 −0
Original line number Diff line number Diff line
@@ -79,6 +79,25 @@ struct clk; 
#define RV1108_EMMC_CON0		0x1e8

#define RV1108_EMMC_CON1		0x1ec



#define RV1126_PMU_MODE			0x0

#define RV1126_PMU_PLL_CON(x)		((x) * 0x4 + 0x10)

#define RV1126_PMU_CLKSEL_CON(x)	((x) * 0x4 + 0x100)

#define RV1126_PMU_CLKGATE_CON(x)	((x) * 0x4 + 0x180)

#define RV1126_PMU_SOFTRST_CON(x)	((x) * 0x4 + 0x200)

#define RV1126_PLL_CON(x)		((x) * 0x4)

#define RV1126_MODE_CON			0x90

#define RV1126_CLKSEL_CON(x)		((x) * 0x4 + 0x100)

#define RV1126_CLKGATE_CON(x)		((x) * 0x4 + 0x280)

#define RV1126_SOFTRST_CON(x)		((x) * 0x4 + 0x300)

#define RV1126_GLB_SRST_FST		0x408

#define RV1126_GLB_SRST_SND		0x40c

#define RV1126_SDMMC_CON0		0x440

#define RV1126_SDMMC_CON1		0x444

#define RV1126_SDIO_CON0		0x448

#define RV1126_SDIO_CON1		0x44c

#define RV1126_EMMC_CON0		0x450

#define RV1126_EMMC_CON1		0x454



#define RK2928_PLL_CON(x)		((x) * 0x4)

#define RK2928_MODE_CON		0x40

#define RK2928_CLKSEL_CON(x)	((x) * 0x4 + 0x44)