Commit 258f0047 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
Browse files

staging: comedi: ni_stc.h: tidy up NI_M_CDO_MODE_REG bits 



Rename the CamelCase and convert enums into defines. Use the BIT()
macro to define the bits.

Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b9abc4aa

drivers/staging/comedi/drivers/ni_mio_common.c

+6 −5
Original line number Diff line number Diff line
@@ -3371,7 +3371,7 @@ static int ni_cdio_cmdtest(struct comedi_device *dev, 
	err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);



	tmp = cmd->scan_begin_arg;

	tmp &= CR_PACK_FLAGS(CDO_Sample_Source_Select_Mask, 0, 0, CR_INVERT);

	tmp &= CR_PACK_FLAGS(NI_M_CDO_MODE_SAMPLE_SRC_MASK, 0, 0, CR_INVERT);

	if (tmp != cmd->scan_begin_arg)

		err |= -EINVAL;
@@ -3456,14 +3456,15 @@ static int ni_cdo_inttrig(struct comedi_device *dev, 
static int ni_cdio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)

{

	const struct comedi_cmd *cmd = &s->async->cmd;

	unsigned cdo_mode_bits = CDO_FIFO_Mode_Bit | CDO_Halt_On_Error_Bit;

	unsigned cdo_mode_bits;

	int retval;



	ni_writel(dev, NI_M_CDO_CMD_RESET, NI_M_CDIO_CMD_REG);

	cdo_mode_bits |= CR_CHAN(cmd->scan_begin_arg) &

			 CDO_Sample_Source_Select_Mask;

	cdo_mode_bits = NI_M_CDO_MODE_FIFO_MODE |

			NI_M_CDO_MODE_HALT_ON_ERROR |

			NI_M_CDO_MODE_SAMPLE_SRC(CR_CHAN(cmd->scan_begin_arg));

	if (cmd->scan_begin_arg & CR_INVERT)

		cdo_mode_bits |= CDO_Polarity_Bit;

		cdo_mode_bits |= NI_M_CDO_MODE_POLARITY;

	ni_writel(dev, cdo_mode_bits, NI_M_CDO_MODE_REG);

	if (s->io_bits) {

		ni_writel(dev, s->state, NI_M_CDO_FIFO_DATA_REG);

drivers/staging/comedi/drivers/ni_stc.h

+14 −15
Original line number Diff line number Diff line
@@ -1092,27 +1092,26 @@ static const struct comedi_lrange range_ni_E_ao_ext; 
#define NI_M_CDI_MODE_SAMPLE_SRC(x)	(((x) & 0x3f) << 0)

#define NI_M_CDI_MODE_SAMPLE_SRC_MASK	NI_M_CDI_MODE_SAMPLE_SRC(0x3f)

#define NI_M_CDO_MODE_REG		0x22c

#define NI_M_CDO_MODE_DATA_LANE(x)	(((x) & 0x3) << 12)

#define NI_M_CDO_MODE_DATA_LANE_MASK	NI_M_CDO_MODE_DATA_LANE(3)

#define NI_M_CDO_MODE_DATA_LANE_0_15	NI_M_CDO_MODE_DATA_LANE(0)

#define NI_M_CDO_MODE_DATA_LANE_16_31	NI_M_CDO_MODE_DATA_LANE(1)

#define NI_M_CDO_MODE_DATA_LANE_0_7	NI_M_CDO_MODE_DATA_LANE(0)

#define NI_M_CDO_MODE_DATA_LANE_8_15	NI_M_CDO_MODE_DATA_LANE(1)

#define NI_M_CDO_MODE_DATA_LANE_16_23	NI_M_CDO_MODE_DATA_LANE(2)

#define NI_M_CDO_MODE_DATA_LANE_24_31	NI_M_CDO_MODE_DATA_LANE(3)

#define NI_M_CDO_MODE_FIFO_MODE		BIT(11)

#define NI_M_CDO_MODE_POLARITY		BIT(10)

#define NI_M_CDO_MODE_HALT_ON_ERROR	BIT(9)

#define NI_M_CDO_MODE_RETRANSMIT	BIT(8)

#define NI_M_CDO_MODE_SAMPLE_SRC(x)	(((x) & 0x3f) << 0)

#define NI_M_CDO_MODE_SAMPLE_SRC_MASK	NI_M_CDO_MODE_SAMPLE_SRC(0x3f)

#define NI_M_CDI_MASK_ENA_REG		0x230

#define NI_M_CDO_MASK_ENA_REG		0x234

#define NI_M_STATIC_AI_CTRL_REG(x)	((x) ? (0x260 + (x)) : 0x064)

#define NI_M_AO_REF_ATTENUATION_REG(x)	(0x264 + (x))

#define NI_M_AO_REF_ATTENUATION_X5	BIT(0)



enum CDO_Mode_Bits {

	CDO_Sample_Source_Select_Mask = 0x3f,

	CDO_Retransmit_Bit = 0x100,

	CDO_Halt_On_Error_Bit = 0x200,

	CDO_Polarity_Bit = 0x400,	/*  sample clock on falling edge */

	CDO_FIFO_Mode_Bit = 0x800,	/*  set for half full mode, clear for not full mode */

	CDO_Data_Lane_Mask = 0x3000,	/*  data lanes specify which dio channels map to byte or word accesses to the dio fifos */

	CDO_Data_Lane_0_15_Bits = 0x0,

	CDO_Data_Lane_16_31_Bits = 0x1000,

	CDO_Data_Lane_0_7_Bits = 0x0,

	CDO_Data_Lane_8_15_Bits = 0x1000,

	CDO_Data_Lane_16_23_Bits = 0x2000,

	CDO_Data_Lane_24_31_Bits = 0x3000

};



enum Interrupt_C_Enable_Bits {

	Interrupt_Group_C_Enable_Bit = 0x1

};