Commit 27c0f3a1 authored by Marco Chiappero's avatar Marco Chiappero Committed by Herbert Xu
Browse files

crypto: qat - test PFVF registers for spurious interrupts on GEN4 



Spurious PFVF interrupts can happen when either the ISR is invoked
without a valid source being set or, otherwise, when no interrupt bit
is set in the PFVF register containing the message.

The latter test was present for GEN2 devices but missing for GEN4, this
patch fills the gap.

Signed-off-by: default avatarMarco Chiappero <marco.chiappero@intel.com>
Reviewed-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 4b61d2bd

drivers/crypto/qat/qat_common/adf_gen4_pfvf.c

+6 −0
Original line number Diff line number Diff line
@@ -96,10 +96,16 @@ static struct pfvf_message adf_gen4_pfvf_recv(struct adf_accel_dev *accel_dev, 
					      u32 pfvf_offset, u8 compat_ver)

{

	void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);

	struct pfvf_message msg = { 0 };

	u32 csr_val;



	/* Read message from the CSR */

	csr_val = ADF_CSR_RD(pmisc_addr, pfvf_offset);

	if (!(csr_val & ADF_PFVF_INT)) {

		dev_info(&GET_DEV(accel_dev),

			 "Spurious PFVF interrupt, msg 0x%.8x. Ignored\n", csr_val);

		return msg;

	}



	/* We can now acknowledge the message reception by clearing the

	 * interrupt bit