Loading drivers/staging/tm6000/tm6000-cards.c +27 −6 Original line number Diff line number Diff line Loading @@ -34,11 +34,12 @@ #define TM6000_BOARD_UNKNOWN 0 #define TM5600_BOARD_GENERIC 1 #define TM6000_BOARD_GENERIC 2 #define TM5600_BOARD_10MOONS_UT821 3 #define TM5600_BOARD_10MOONS_UT330 4 #define TM6000_BOARD_ADSTECH_DUAL_TV 5 #define TM6000_BOARD_FREECOM_AND_SIMILAR 6 #define TM6000_BOARD_ADSTECH_MINI_DUAL_TV 7 #define TM6010_BOARD_GENERIC 3 #define TM5600_BOARD_10MOONS_UT821 4 #define TM5600_BOARD_10MOONS_UT330 5 #define TM6000_BOARD_ADSTECH_DUAL_TV 6 #define TM6000_BOARD_FREECOM_AND_SIMILAR 7 #define TM6000_BOARD_ADSTECH_MINI_DUAL_TV 8 #define TM6000_MAXBOARDS 16 static unsigned int card[] = {[0 ... (TM6000_MAXBOARDS - 1)] = UNSET }; Loading @@ -53,6 +54,7 @@ struct tm6000_board { struct tm6000_capabilities caps; enum tm6000_devtype type; /* variant of the chipset */ int tuner_type; /* type of the tuner */ int tuner_addr; /* tuner address */ int demod_addr; /* demodulator address */ Loading @@ -69,6 +71,7 @@ struct tm6000_board tm6000_boards[] = { }, [TM5600_BOARD_GENERIC] = { .name = "Generic tm5600 board", .type = TM5600, .tuner_type = TUNER_XC2028, .tuner_addr = 0xc2, .caps = { Loading @@ -86,9 +89,21 @@ struct tm6000_board tm6000_boards[] = { }, .gpio_addr_tun_reset = TM6000_GPIO_1, }, [TM6010_BOARD_GENERIC] = { .name = "Generic tm6010 board", .type = TM6010, .tuner_type = TUNER_XC2028, .tuner_addr = 0xc2, .caps = { .has_tuner = 1, .has_dvb = 1, }, .gpio_addr_tun_reset = TM6010_GPIO_4, }, [TM5600_BOARD_10MOONS_UT821] = { .name = "10Moons UT 821", .tuner_type = TUNER_XC2028, .type = TM5600, .tuner_addr = 0xc2, .caps = { .has_tuner = 1, Loading Loading @@ -151,6 +166,7 @@ struct tm6000_board tm6000_boards[] = { /* table of devices that work with this driver */ struct usb_device_id tm6000_id_table [] = { { USB_DEVICE(0x6000, 0x0001), .driver_info = TM5600_BOARD_10MOONS_UT821 }, { USB_DEVICE(0x6000, 0x0002), .driver_info = TM6010_BOARD_GENERIC }, { USB_DEVICE(0x06e1, 0xf332), .driver_info = TM6000_BOARD_ADSTECH_DUAL_TV }, { USB_DEVICE(0x14aa, 0x0620), .driver_info = TM6000_BOARD_FREECOM_AND_SIMILAR }, { USB_DEVICE(0x06e1, 0xb339), .driver_info = TM6000_BOARD_ADSTECH_MINI_DUAL_TV }, Loading @@ -167,7 +183,11 @@ static void tm6000_config_tuner (struct tm6000_core *dev) request_module ("tuner"); if (dev->tuner_type == TUNER_XC2028) { if (dev->dev_type == TM6010) ctl.fname = "xc3028-v27.fw"; else ctl.fname = "tm6000-xc3028.fw"; ctl.mts = 1; xc2028_cfg.tuner = TUNER_XC2028; Loading @@ -189,6 +209,7 @@ static int tm6000_init_dev(struct tm6000_core *dev) mutex_lock(&dev->lock); /* Initializa board-specific data */ dev->dev_type = tm6000_boards[dev->model].type; dev->tuner_type = tm6000_boards[dev->model].tuner_type; dev->tuner_addr = tm6000_boards[dev->model].tuner_addr; dev->tuner_reset_gpio = tm6000_boards[dev->model].gpio_addr_tun_reset; Loading drivers/staging/tm6000/tm6000-core.c +215 −104 Original line number Diff line number Diff line Loading @@ -151,7 +151,16 @@ void tm6000_set_fourcc_format(struct tm6000_core *dev) int tm6000_init_analog_mode (struct tm6000_core *dev) { if (dev->dev_type == TM6010) { int val; /* Enable video */ val = tm6000_get_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, 0); val |= 0x60; tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, val); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xfe, 0xcf); } else { /* Enables soft reset */ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01); Loading @@ -161,6 +170,7 @@ int tm6000_init_analog_mode (struct tm6000_core *dev) /* Enable Hfilter and disable TS Drop err */ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, 0x80); } tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc3, 0x88); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xda, 0x23); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd1, 0xc0); Loading @@ -181,16 +191,14 @@ int tm6000_init_analog_mode (struct tm6000_core *dev) tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60); /* Tuner firmware can now be loaded */ tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0x00); msleep(11); /* This controls input */ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0); tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01); } msleep(20); /* Tuner firmware can now be loaded */ /*FIXME: Hack!!! */ struct v4l2_frequency f; mutex_lock(&dev->lock); Loading @@ -202,7 +210,6 @@ int tm6000_init_analog_mode (struct tm6000_core *dev) tm6000_set_standard (dev, &dev->norm); tm6000_set_audio_bitrate (dev,48000); return 0; } Loading Loading @@ -238,88 +245,183 @@ int tm6000_init_digital_mode (struct tm6000_core *dev) return 0; } struct reg_init { u8 req; u8 reg; u8 val; }; /* The meaning of those initializations are unknown */ u8 init_tab[][2] = { struct reg_init tm6000_init_tab[] = { /* REG VALUE */ { 0xdf, 0x1f }, { 0xff, 0x08 }, { 0xff, 0x00 }, { 0xd5, 0x4f }, { 0xda, 0x23 }, { 0xdb, 0x08 }, { 0xe2, 0x00 }, { 0xe3, 0x10 }, { 0xe5, 0x00 }, { 0xe8, 0x00 }, { 0xeb, 0x64 }, /* 48000 bits/sample, external input */ { 0xee, 0xc2 }, { 0x3f, 0x01 }, /* Start of soft reset */ { 0x00, 0x00 }, { 0x01, 0x07 }, { 0x02, 0x5f }, { 0x03, 0x00 }, { 0x05, 0x64 }, { 0x07, 0x01 }, { 0x08, 0x82 }, { 0x09, 0x36 }, { 0x0a, 0x50 }, { 0x0c, 0x6a }, { 0x11, 0xc9 }, { 0x12, 0x07 }, { 0x13, 0x3b }, { 0x14, 0x47 }, { 0x15, 0x6f }, { 0x17, 0xcd }, { 0x18, 0x1e }, { 0x19, 0x8b }, { 0x1a, 0xa2 }, { 0x1b, 0xe9 }, { 0x1c, 0x1c }, { 0x1d, 0xcc }, { 0x1e, 0xcc }, { 0x1f, 0xcd }, { 0x20, 0x3c }, { 0x21, 0x3c }, { 0x2d, 0x48 }, { 0x2e, 0x88 }, { 0x30, 0x22 }, { 0x31, 0x61 }, { 0x32, 0x74 }, { 0x33, 0x1c }, { 0x34, 0x74 }, { 0x35, 0x1c }, { 0x36, 0x7a }, { 0x37, 0x26 }, { 0x38, 0x40 }, { 0x39, 0x0a }, { 0x42, 0x55 }, { 0x51, 0x11 }, { 0x55, 0x01 }, { 0x57, 0x02 }, { 0x58, 0x35 }, { 0x59, 0xa0 }, { 0x80, 0x15 }, { 0x82, 0x42 }, { 0xc1, 0xd0 }, { 0xc3, 0x88 }, { 0x3f, 0x00 }, /* End of the soft reset */ { REQ_07_SET_GET_AVREG, 0xdf, 0x1f }, { REQ_07_SET_GET_AVREG, 0xff, 0x08 }, { REQ_07_SET_GET_AVREG, 0xff, 0x00 }, { REQ_07_SET_GET_AVREG, 0xd5, 0x4f }, { REQ_07_SET_GET_AVREG, 0xda, 0x23 }, { REQ_07_SET_GET_AVREG, 0xdb, 0x08 }, { REQ_07_SET_GET_AVREG, 0xe2, 0x00 }, { REQ_07_SET_GET_AVREG, 0xe3, 0x10 }, { REQ_07_SET_GET_AVREG, 0xe5, 0x00 }, { REQ_07_SET_GET_AVREG, 0xe8, 0x00 }, { REQ_07_SET_GET_AVREG, 0xeb, 0x64 }, /* 48000 bits/sample, external input */ { REQ_07_SET_GET_AVREG, 0xee, 0xc2 }, { REQ_07_SET_GET_AVREG, 0x3f, 0x01 }, /* Start of soft reset */ { REQ_07_SET_GET_AVREG, 0x00, 0x00 }, { REQ_07_SET_GET_AVREG, 0x01, 0x07 }, { REQ_07_SET_GET_AVREG, 0x02, 0x5f }, { REQ_07_SET_GET_AVREG, 0x03, 0x00 }, { REQ_07_SET_GET_AVREG, 0x05, 0x64 }, { REQ_07_SET_GET_AVREG, 0x07, 0x01 }, { REQ_07_SET_GET_AVREG, 0x08, 0x82 }, { REQ_07_SET_GET_AVREG, 0x09, 0x36 }, { REQ_07_SET_GET_AVREG, 0x0a, 0x50 }, { REQ_07_SET_GET_AVREG, 0x0c, 0x6a }, { REQ_07_SET_GET_AVREG, 0x11, 0xc9 }, { REQ_07_SET_GET_AVREG, 0x12, 0x07 }, { REQ_07_SET_GET_AVREG, 0x13, 0x3b }, { REQ_07_SET_GET_AVREG, 0x14, 0x47 }, { REQ_07_SET_GET_AVREG, 0x15, 0x6f }, { REQ_07_SET_GET_AVREG, 0x17, 0xcd }, { REQ_07_SET_GET_AVREG, 0x18, 0x1e }, { REQ_07_SET_GET_AVREG, 0x19, 0x8b }, { REQ_07_SET_GET_AVREG, 0x1a, 0xa2 }, { REQ_07_SET_GET_AVREG, 0x1b, 0xe9 }, { REQ_07_SET_GET_AVREG, 0x1c, 0x1c }, { REQ_07_SET_GET_AVREG, 0x1d, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1e, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1f, 0xcd }, { REQ_07_SET_GET_AVREG, 0x20, 0x3c }, { REQ_07_SET_GET_AVREG, 0x21, 0x3c }, { REQ_07_SET_GET_AVREG, 0x2d, 0x48 }, { REQ_07_SET_GET_AVREG, 0x2e, 0x88 }, { REQ_07_SET_GET_AVREG, 0x30, 0x22 }, { REQ_07_SET_GET_AVREG, 0x31, 0x61 }, { REQ_07_SET_GET_AVREG, 0x32, 0x74 }, { REQ_07_SET_GET_AVREG, 0x33, 0x1c }, { REQ_07_SET_GET_AVREG, 0x34, 0x74 }, { REQ_07_SET_GET_AVREG, 0x35, 0x1c }, { REQ_07_SET_GET_AVREG, 0x36, 0x7a }, { REQ_07_SET_GET_AVREG, 0x37, 0x26 }, { REQ_07_SET_GET_AVREG, 0x38, 0x40 }, { REQ_07_SET_GET_AVREG, 0x39, 0x0a }, { REQ_07_SET_GET_AVREG, 0x42, 0x55 }, { REQ_07_SET_GET_AVREG, 0x51, 0x11 }, { REQ_07_SET_GET_AVREG, 0x55, 0x01 }, { REQ_07_SET_GET_AVREG, 0x57, 0x02 }, { REQ_07_SET_GET_AVREG, 0x58, 0x35 }, { REQ_07_SET_GET_AVREG, 0x59, 0xa0 }, { REQ_07_SET_GET_AVREG, 0x80, 0x15 }, { REQ_07_SET_GET_AVREG, 0x82, 0x42 }, { REQ_07_SET_GET_AVREG, 0xc1, 0xd0 }, { REQ_07_SET_GET_AVREG, 0xc3, 0x88 }, { REQ_07_SET_GET_AVREG, 0x3f, 0x00 }, /* End of the soft reset */ { REQ_05_SET_GET_USBREG, 0x18, 0x00 }, }; struct reg_init tm6010_init_tab[] = { { REQ_07_SET_GET_AVREG, 0xc0, 0x00 }, { REQ_07_SET_GET_AVREG, 0xc4, 0xa0 }, { REQ_07_SET_GET_AVREG, 0xc6, 0x40 }, { REQ_07_SET_GET_AVREG, 0xca, 0x31 }, { REQ_07_SET_GET_AVREG, 0xcc, 0xe1 }, { REQ_07_SET_GET_AVREG, 0xe0, 0x03 }, { REQ_07_SET_GET_AVREG, 0xfe, 0x7f }, { REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0 }, { REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4 }, { REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8 }, { REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00 }, { REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2 }, { REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0 }, { REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2 }, { REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60 }, { REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc }, { REQ_07_SET_GET_AVREG, 0x3f, 0x01 }, { REQ_07_SET_GET_AVREG, 0x00, 0x00 }, { REQ_07_SET_GET_AVREG, 0x01, 0x07 }, { REQ_07_SET_GET_AVREG, 0x02, 0x5f }, { REQ_07_SET_GET_AVREG, 0x03, 0x00 }, { REQ_07_SET_GET_AVREG, 0x05, 0x64 }, { REQ_07_SET_GET_AVREG, 0x07, 0x01 }, { REQ_07_SET_GET_AVREG, 0x08, 0x82 }, { REQ_07_SET_GET_AVREG, 0x09, 0x36 }, { REQ_07_SET_GET_AVREG, 0x0a, 0x50 }, { REQ_07_SET_GET_AVREG, 0x0c, 0x6a }, { REQ_07_SET_GET_AVREG, 0x11, 0xc9 }, { REQ_07_SET_GET_AVREG, 0x12, 0x07 }, { REQ_07_SET_GET_AVREG, 0x13, 0x3b }, { REQ_07_SET_GET_AVREG, 0x14, 0x47 }, { REQ_07_SET_GET_AVREG, 0x15, 0x6f }, { REQ_07_SET_GET_AVREG, 0x17, 0xcd }, { REQ_07_SET_GET_AVREG, 0x18, 0x1e }, { REQ_07_SET_GET_AVREG, 0x19, 0x8b }, { REQ_07_SET_GET_AVREG, 0x1a, 0xa2 }, { REQ_07_SET_GET_AVREG, 0x1b, 0xe9 }, { REQ_07_SET_GET_AVREG, 0x1c, 0x1c }, { REQ_07_SET_GET_AVREG, 0x1d, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1e, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1f, 0xcd }, { REQ_07_SET_GET_AVREG, 0x20, 0x3c }, { REQ_07_SET_GET_AVREG, 0x21, 0x3c }, { REQ_07_SET_GET_AVREG, 0x2d, 0x48 }, { REQ_07_SET_GET_AVREG, 0x2e, 0x88 }, { REQ_07_SET_GET_AVREG, 0x30, 0x22 }, { REQ_07_SET_GET_AVREG, 0x31, 0x61 }, { REQ_07_SET_GET_AVREG, 0x32, 0x74 }, { REQ_07_SET_GET_AVREG, 0x33, 0x1c }, { REQ_07_SET_GET_AVREG, 0x34, 0x74 }, { REQ_07_SET_GET_AVREG, 0x35, 0x1c }, { REQ_07_SET_GET_AVREG, 0x36, 0x7a }, { REQ_07_SET_GET_AVREG, 0x37, 0x26 }, { REQ_07_SET_GET_AVREG, 0x38, 0x40 }, { REQ_07_SET_GET_AVREG, 0x39, 0x0a }, { REQ_07_SET_GET_AVREG, 0x42, 0x55 }, { REQ_07_SET_GET_AVREG, 0x51, 0x11 }, { REQ_07_SET_GET_AVREG, 0x55, 0x01 }, { REQ_07_SET_GET_AVREG, 0x57, 0x02 }, { REQ_07_SET_GET_AVREG, 0x58, 0x35 }, { REQ_07_SET_GET_AVREG, 0x59, 0xa0 }, { REQ_07_SET_GET_AVREG, 0x80, 0x15 }, { REQ_07_SET_GET_AVREG, 0x82, 0x42 }, { REQ_07_SET_GET_AVREG, 0xc1, 0xd0 }, { REQ_07_SET_GET_AVREG, 0xc3, 0x88 }, { REQ_07_SET_GET_AVREG, 0x3f, 0x00 }, { REQ_05_SET_GET_USBREG, 0x18, 0x00 }, /* set remote wakeup key:any key wakeup */ { REQ_07_SET_GET_AVREG, 0xe5, 0xfe }, { REQ_07_SET_GET_AVREG, 0xda, 0xff }, }; int tm6000_init (struct tm6000_core *dev) { int board, rc=0, i; int board, rc=0, i, size; struct reg_init *tab; if (dev->dev_type == TM6010) { tab = tm6010_init_tab; size = ARRAY_SIZE(tm6010_init_tab); } else { tab = tm6000_init_tab; size = ARRAY_SIZE(tm6000_init_tab); } /* Load board's initialization table */ for (i=0; i< ARRAY_SIZE(init_tab); i++) { rc= tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, init_tab[i][0],init_tab[i][1]); for (i=0; i< size; i++) { rc= tm6000_set_reg (dev, tab[i].req, tab[i].reg, tab[i].val); if (rc<0) { printk (KERN_ERR "Error %i while setting reg %d to value %d\n", rc, init_tab[i][0],init_tab[i][1]); printk (KERN_ERR "Error %i while setting req %d, " "reg %d to value %d\n", rc, tab[i].req,tab[i].reg, tab[i].val); return rc; } } msleep(5); /* Just to be conservative */ /* Check board version - maybe 10Moons specific */ board=tm6000_get_reg16 (dev, 0x40, 0, 0); if (board >=0) { Loading @@ -328,19 +430,24 @@ int tm6000_init (struct tm6000_core *dev) printk (KERN_ERR "Error %i while retrieving board version\n",board); } tm6000_set_reg (dev, REQ_05_SET_GET_USBREG, 0x18, 0x00); msleep(5); /* Just to be conservative */ if (dev->dev_type == TM6010) { /* Turn xceive 3028 on */ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6010_GPIO_3, 0x01); msleep(11); } /* Reset GPIO1 and GPIO4. */ for (i=0; i< 2; i++) { rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0); rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, dev->tuner_reset_gpio, 0x00); if (rc<0) { printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc); return rc; } msleep(10); /* Just to be conservative */ rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 1); rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, dev->tuner_reset_gpio, 0x01); if (rc<0) { printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc); return rc; Loading @@ -360,8 +467,12 @@ int tm6000_init (struct tm6000_core *dev) return rc; } if (!i) if (!i) { rc=tm6000_get_reg16(dev, 0x40,0,0); if (rc>=0) { printk ("board=%d\n", rc); } } } msleep(50); Loading drivers/staging/tm6000/tm6000-regs.h +11 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,7 @@ #define TM6000_GPIO_CLK 0x101 #define TM6000_GPIO_DATA 0x100 #define TM6000_GPIO_1 0x102 #define TM6000_GPIO_2 0x103 #define TM6000_GPIO_3 0x104 Loading @@ -62,6 +63,16 @@ #define TM6000_GPIO_6 0x304 #define TM6000_GPIO_7 0x305 /* tm6010 defines GPIO with different values */ #define TM6010_GPIO_0 0x0102 #define TM6010_GPIO_1 0x0103 #define TM6010_GPIO_2 0x0104 #define TM6010_GPIO_3 0x0105 #define TM6010_GPIO_4 0x0106 #define TM6010_GPIO_5 0x0107 #define TM6010_GPIO_6 0x0300 #define TM6010_GPIO_7 0x0301 #define TM6010_GPIO_9 0x0305 /* * Define TV Master TM5600/TM6000 URB message codes and length */ Loading drivers/staging/tm6000/tm6000-stds.c +4 −6 Original line number Diff line number Diff line Loading @@ -781,11 +781,8 @@ static int tm6000_load_std(struct tm6000_core *dev, if (!set[i].req) return 0; /* FIXME: REQ 8 settings are for tm6010 not tested yet This doesn't work with tm5600 */ if (set[i].req == REQ_08_SET_GET_AVREG_BIT) if ((dev->dev_type != TM6010) && (set[i].req == REQ_08_SET_GET_AVREG_BIT)) continue; rc = tm6000_set_reg(dev, set[i].req, set[i].reg, set[i].value); Loading Loading @@ -871,5 +868,6 @@ int tm6000_set_standard(struct tm6000_core *dev, v4l2_std_id * norm) msleep(40); return 0; } drivers/staging/tm6000/tm6000.h +6 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,11 @@ enum tm6000_itype { TM6000_INPUT_SVIDEO, }; enum tm6000_devtype { TM6000 = 0, TM5600, TM6010, }; /* ------------------------------------------------------------------ Basic structures Loading Loading @@ -121,6 +126,7 @@ struct tm6000_core { char name[30]; /* name (including minor) of the device */ int model; /* index in the device_data struct */ int devno; /* marks the number of this device */ enum tm6000_devtype dev_type; /* type of device */ v4l2_std_id norm; /* Current norm */ int width,height; /* Selected resolution */ Loading Loading
drivers/staging/tm6000/tm6000-cards.c +27 −6 Original line number Diff line number Diff line Loading @@ -34,11 +34,12 @@ #define TM6000_BOARD_UNKNOWN 0 #define TM5600_BOARD_GENERIC 1 #define TM6000_BOARD_GENERIC 2 #define TM5600_BOARD_10MOONS_UT821 3 #define TM5600_BOARD_10MOONS_UT330 4 #define TM6000_BOARD_ADSTECH_DUAL_TV 5 #define TM6000_BOARD_FREECOM_AND_SIMILAR 6 #define TM6000_BOARD_ADSTECH_MINI_DUAL_TV 7 #define TM6010_BOARD_GENERIC 3 #define TM5600_BOARD_10MOONS_UT821 4 #define TM5600_BOARD_10MOONS_UT330 5 #define TM6000_BOARD_ADSTECH_DUAL_TV 6 #define TM6000_BOARD_FREECOM_AND_SIMILAR 7 #define TM6000_BOARD_ADSTECH_MINI_DUAL_TV 8 #define TM6000_MAXBOARDS 16 static unsigned int card[] = {[0 ... (TM6000_MAXBOARDS - 1)] = UNSET }; Loading @@ -53,6 +54,7 @@ struct tm6000_board { struct tm6000_capabilities caps; enum tm6000_devtype type; /* variant of the chipset */ int tuner_type; /* type of the tuner */ int tuner_addr; /* tuner address */ int demod_addr; /* demodulator address */ Loading @@ -69,6 +71,7 @@ struct tm6000_board tm6000_boards[] = { }, [TM5600_BOARD_GENERIC] = { .name = "Generic tm5600 board", .type = TM5600, .tuner_type = TUNER_XC2028, .tuner_addr = 0xc2, .caps = { Loading @@ -86,9 +89,21 @@ struct tm6000_board tm6000_boards[] = { }, .gpio_addr_tun_reset = TM6000_GPIO_1, }, [TM6010_BOARD_GENERIC] = { .name = "Generic tm6010 board", .type = TM6010, .tuner_type = TUNER_XC2028, .tuner_addr = 0xc2, .caps = { .has_tuner = 1, .has_dvb = 1, }, .gpio_addr_tun_reset = TM6010_GPIO_4, }, [TM5600_BOARD_10MOONS_UT821] = { .name = "10Moons UT 821", .tuner_type = TUNER_XC2028, .type = TM5600, .tuner_addr = 0xc2, .caps = { .has_tuner = 1, Loading Loading @@ -151,6 +166,7 @@ struct tm6000_board tm6000_boards[] = { /* table of devices that work with this driver */ struct usb_device_id tm6000_id_table [] = { { USB_DEVICE(0x6000, 0x0001), .driver_info = TM5600_BOARD_10MOONS_UT821 }, { USB_DEVICE(0x6000, 0x0002), .driver_info = TM6010_BOARD_GENERIC }, { USB_DEVICE(0x06e1, 0xf332), .driver_info = TM6000_BOARD_ADSTECH_DUAL_TV }, { USB_DEVICE(0x14aa, 0x0620), .driver_info = TM6000_BOARD_FREECOM_AND_SIMILAR }, { USB_DEVICE(0x06e1, 0xb339), .driver_info = TM6000_BOARD_ADSTECH_MINI_DUAL_TV }, Loading @@ -167,7 +183,11 @@ static void tm6000_config_tuner (struct tm6000_core *dev) request_module ("tuner"); if (dev->tuner_type == TUNER_XC2028) { if (dev->dev_type == TM6010) ctl.fname = "xc3028-v27.fw"; else ctl.fname = "tm6000-xc3028.fw"; ctl.mts = 1; xc2028_cfg.tuner = TUNER_XC2028; Loading @@ -189,6 +209,7 @@ static int tm6000_init_dev(struct tm6000_core *dev) mutex_lock(&dev->lock); /* Initializa board-specific data */ dev->dev_type = tm6000_boards[dev->model].type; dev->tuner_type = tm6000_boards[dev->model].tuner_type; dev->tuner_addr = tm6000_boards[dev->model].tuner_addr; dev->tuner_reset_gpio = tm6000_boards[dev->model].gpio_addr_tun_reset; Loading
drivers/staging/tm6000/tm6000-core.c +215 −104 Original line number Diff line number Diff line Loading @@ -151,7 +151,16 @@ void tm6000_set_fourcc_format(struct tm6000_core *dev) int tm6000_init_analog_mode (struct tm6000_core *dev) { if (dev->dev_type == TM6010) { int val; /* Enable video */ val = tm6000_get_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, 0); val |= 0x60; tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, val); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xfe, 0xcf); } else { /* Enables soft reset */ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01); Loading @@ -161,6 +170,7 @@ int tm6000_init_analog_mode (struct tm6000_core *dev) /* Enable Hfilter and disable TS Drop err */ tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, 0x80); } tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc3, 0x88); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xda, 0x23); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd1, 0xc0); Loading @@ -181,16 +191,14 @@ int tm6000_init_analog_mode (struct tm6000_core *dev) tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00); tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60); /* Tuner firmware can now be loaded */ tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0x00); msleep(11); /* This controls input */ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0); tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01); } msleep(20); /* Tuner firmware can now be loaded */ /*FIXME: Hack!!! */ struct v4l2_frequency f; mutex_lock(&dev->lock); Loading @@ -202,7 +210,6 @@ int tm6000_init_analog_mode (struct tm6000_core *dev) tm6000_set_standard (dev, &dev->norm); tm6000_set_audio_bitrate (dev,48000); return 0; } Loading Loading @@ -238,88 +245,183 @@ int tm6000_init_digital_mode (struct tm6000_core *dev) return 0; } struct reg_init { u8 req; u8 reg; u8 val; }; /* The meaning of those initializations are unknown */ u8 init_tab[][2] = { struct reg_init tm6000_init_tab[] = { /* REG VALUE */ { 0xdf, 0x1f }, { 0xff, 0x08 }, { 0xff, 0x00 }, { 0xd5, 0x4f }, { 0xda, 0x23 }, { 0xdb, 0x08 }, { 0xe2, 0x00 }, { 0xe3, 0x10 }, { 0xe5, 0x00 }, { 0xe8, 0x00 }, { 0xeb, 0x64 }, /* 48000 bits/sample, external input */ { 0xee, 0xc2 }, { 0x3f, 0x01 }, /* Start of soft reset */ { 0x00, 0x00 }, { 0x01, 0x07 }, { 0x02, 0x5f }, { 0x03, 0x00 }, { 0x05, 0x64 }, { 0x07, 0x01 }, { 0x08, 0x82 }, { 0x09, 0x36 }, { 0x0a, 0x50 }, { 0x0c, 0x6a }, { 0x11, 0xc9 }, { 0x12, 0x07 }, { 0x13, 0x3b }, { 0x14, 0x47 }, { 0x15, 0x6f }, { 0x17, 0xcd }, { 0x18, 0x1e }, { 0x19, 0x8b }, { 0x1a, 0xa2 }, { 0x1b, 0xe9 }, { 0x1c, 0x1c }, { 0x1d, 0xcc }, { 0x1e, 0xcc }, { 0x1f, 0xcd }, { 0x20, 0x3c }, { 0x21, 0x3c }, { 0x2d, 0x48 }, { 0x2e, 0x88 }, { 0x30, 0x22 }, { 0x31, 0x61 }, { 0x32, 0x74 }, { 0x33, 0x1c }, { 0x34, 0x74 }, { 0x35, 0x1c }, { 0x36, 0x7a }, { 0x37, 0x26 }, { 0x38, 0x40 }, { 0x39, 0x0a }, { 0x42, 0x55 }, { 0x51, 0x11 }, { 0x55, 0x01 }, { 0x57, 0x02 }, { 0x58, 0x35 }, { 0x59, 0xa0 }, { 0x80, 0x15 }, { 0x82, 0x42 }, { 0xc1, 0xd0 }, { 0xc3, 0x88 }, { 0x3f, 0x00 }, /* End of the soft reset */ { REQ_07_SET_GET_AVREG, 0xdf, 0x1f }, { REQ_07_SET_GET_AVREG, 0xff, 0x08 }, { REQ_07_SET_GET_AVREG, 0xff, 0x00 }, { REQ_07_SET_GET_AVREG, 0xd5, 0x4f }, { REQ_07_SET_GET_AVREG, 0xda, 0x23 }, { REQ_07_SET_GET_AVREG, 0xdb, 0x08 }, { REQ_07_SET_GET_AVREG, 0xe2, 0x00 }, { REQ_07_SET_GET_AVREG, 0xe3, 0x10 }, { REQ_07_SET_GET_AVREG, 0xe5, 0x00 }, { REQ_07_SET_GET_AVREG, 0xe8, 0x00 }, { REQ_07_SET_GET_AVREG, 0xeb, 0x64 }, /* 48000 bits/sample, external input */ { REQ_07_SET_GET_AVREG, 0xee, 0xc2 }, { REQ_07_SET_GET_AVREG, 0x3f, 0x01 }, /* Start of soft reset */ { REQ_07_SET_GET_AVREG, 0x00, 0x00 }, { REQ_07_SET_GET_AVREG, 0x01, 0x07 }, { REQ_07_SET_GET_AVREG, 0x02, 0x5f }, { REQ_07_SET_GET_AVREG, 0x03, 0x00 }, { REQ_07_SET_GET_AVREG, 0x05, 0x64 }, { REQ_07_SET_GET_AVREG, 0x07, 0x01 }, { REQ_07_SET_GET_AVREG, 0x08, 0x82 }, { REQ_07_SET_GET_AVREG, 0x09, 0x36 }, { REQ_07_SET_GET_AVREG, 0x0a, 0x50 }, { REQ_07_SET_GET_AVREG, 0x0c, 0x6a }, { REQ_07_SET_GET_AVREG, 0x11, 0xc9 }, { REQ_07_SET_GET_AVREG, 0x12, 0x07 }, { REQ_07_SET_GET_AVREG, 0x13, 0x3b }, { REQ_07_SET_GET_AVREG, 0x14, 0x47 }, { REQ_07_SET_GET_AVREG, 0x15, 0x6f }, { REQ_07_SET_GET_AVREG, 0x17, 0xcd }, { REQ_07_SET_GET_AVREG, 0x18, 0x1e }, { REQ_07_SET_GET_AVREG, 0x19, 0x8b }, { REQ_07_SET_GET_AVREG, 0x1a, 0xa2 }, { REQ_07_SET_GET_AVREG, 0x1b, 0xe9 }, { REQ_07_SET_GET_AVREG, 0x1c, 0x1c }, { REQ_07_SET_GET_AVREG, 0x1d, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1e, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1f, 0xcd }, { REQ_07_SET_GET_AVREG, 0x20, 0x3c }, { REQ_07_SET_GET_AVREG, 0x21, 0x3c }, { REQ_07_SET_GET_AVREG, 0x2d, 0x48 }, { REQ_07_SET_GET_AVREG, 0x2e, 0x88 }, { REQ_07_SET_GET_AVREG, 0x30, 0x22 }, { REQ_07_SET_GET_AVREG, 0x31, 0x61 }, { REQ_07_SET_GET_AVREG, 0x32, 0x74 }, { REQ_07_SET_GET_AVREG, 0x33, 0x1c }, { REQ_07_SET_GET_AVREG, 0x34, 0x74 }, { REQ_07_SET_GET_AVREG, 0x35, 0x1c }, { REQ_07_SET_GET_AVREG, 0x36, 0x7a }, { REQ_07_SET_GET_AVREG, 0x37, 0x26 }, { REQ_07_SET_GET_AVREG, 0x38, 0x40 }, { REQ_07_SET_GET_AVREG, 0x39, 0x0a }, { REQ_07_SET_GET_AVREG, 0x42, 0x55 }, { REQ_07_SET_GET_AVREG, 0x51, 0x11 }, { REQ_07_SET_GET_AVREG, 0x55, 0x01 }, { REQ_07_SET_GET_AVREG, 0x57, 0x02 }, { REQ_07_SET_GET_AVREG, 0x58, 0x35 }, { REQ_07_SET_GET_AVREG, 0x59, 0xa0 }, { REQ_07_SET_GET_AVREG, 0x80, 0x15 }, { REQ_07_SET_GET_AVREG, 0x82, 0x42 }, { REQ_07_SET_GET_AVREG, 0xc1, 0xd0 }, { REQ_07_SET_GET_AVREG, 0xc3, 0x88 }, { REQ_07_SET_GET_AVREG, 0x3f, 0x00 }, /* End of the soft reset */ { REQ_05_SET_GET_USBREG, 0x18, 0x00 }, }; struct reg_init tm6010_init_tab[] = { { REQ_07_SET_GET_AVREG, 0xc0, 0x00 }, { REQ_07_SET_GET_AVREG, 0xc4, 0xa0 }, { REQ_07_SET_GET_AVREG, 0xc6, 0x40 }, { REQ_07_SET_GET_AVREG, 0xca, 0x31 }, { REQ_07_SET_GET_AVREG, 0xcc, 0xe1 }, { REQ_07_SET_GET_AVREG, 0xe0, 0x03 }, { REQ_07_SET_GET_AVREG, 0xfe, 0x7f }, { REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0 }, { REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4 }, { REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8 }, { REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00 }, { REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2 }, { REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0 }, { REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2 }, { REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60 }, { REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc }, { REQ_07_SET_GET_AVREG, 0x3f, 0x01 }, { REQ_07_SET_GET_AVREG, 0x00, 0x00 }, { REQ_07_SET_GET_AVREG, 0x01, 0x07 }, { REQ_07_SET_GET_AVREG, 0x02, 0x5f }, { REQ_07_SET_GET_AVREG, 0x03, 0x00 }, { REQ_07_SET_GET_AVREG, 0x05, 0x64 }, { REQ_07_SET_GET_AVREG, 0x07, 0x01 }, { REQ_07_SET_GET_AVREG, 0x08, 0x82 }, { REQ_07_SET_GET_AVREG, 0x09, 0x36 }, { REQ_07_SET_GET_AVREG, 0x0a, 0x50 }, { REQ_07_SET_GET_AVREG, 0x0c, 0x6a }, { REQ_07_SET_GET_AVREG, 0x11, 0xc9 }, { REQ_07_SET_GET_AVREG, 0x12, 0x07 }, { REQ_07_SET_GET_AVREG, 0x13, 0x3b }, { REQ_07_SET_GET_AVREG, 0x14, 0x47 }, { REQ_07_SET_GET_AVREG, 0x15, 0x6f }, { REQ_07_SET_GET_AVREG, 0x17, 0xcd }, { REQ_07_SET_GET_AVREG, 0x18, 0x1e }, { REQ_07_SET_GET_AVREG, 0x19, 0x8b }, { REQ_07_SET_GET_AVREG, 0x1a, 0xa2 }, { REQ_07_SET_GET_AVREG, 0x1b, 0xe9 }, { REQ_07_SET_GET_AVREG, 0x1c, 0x1c }, { REQ_07_SET_GET_AVREG, 0x1d, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1e, 0xcc }, { REQ_07_SET_GET_AVREG, 0x1f, 0xcd }, { REQ_07_SET_GET_AVREG, 0x20, 0x3c }, { REQ_07_SET_GET_AVREG, 0x21, 0x3c }, { REQ_07_SET_GET_AVREG, 0x2d, 0x48 }, { REQ_07_SET_GET_AVREG, 0x2e, 0x88 }, { REQ_07_SET_GET_AVREG, 0x30, 0x22 }, { REQ_07_SET_GET_AVREG, 0x31, 0x61 }, { REQ_07_SET_GET_AVREG, 0x32, 0x74 }, { REQ_07_SET_GET_AVREG, 0x33, 0x1c }, { REQ_07_SET_GET_AVREG, 0x34, 0x74 }, { REQ_07_SET_GET_AVREG, 0x35, 0x1c }, { REQ_07_SET_GET_AVREG, 0x36, 0x7a }, { REQ_07_SET_GET_AVREG, 0x37, 0x26 }, { REQ_07_SET_GET_AVREG, 0x38, 0x40 }, { REQ_07_SET_GET_AVREG, 0x39, 0x0a }, { REQ_07_SET_GET_AVREG, 0x42, 0x55 }, { REQ_07_SET_GET_AVREG, 0x51, 0x11 }, { REQ_07_SET_GET_AVREG, 0x55, 0x01 }, { REQ_07_SET_GET_AVREG, 0x57, 0x02 }, { REQ_07_SET_GET_AVREG, 0x58, 0x35 }, { REQ_07_SET_GET_AVREG, 0x59, 0xa0 }, { REQ_07_SET_GET_AVREG, 0x80, 0x15 }, { REQ_07_SET_GET_AVREG, 0x82, 0x42 }, { REQ_07_SET_GET_AVREG, 0xc1, 0xd0 }, { REQ_07_SET_GET_AVREG, 0xc3, 0x88 }, { REQ_07_SET_GET_AVREG, 0x3f, 0x00 }, { REQ_05_SET_GET_USBREG, 0x18, 0x00 }, /* set remote wakeup key:any key wakeup */ { REQ_07_SET_GET_AVREG, 0xe5, 0xfe }, { REQ_07_SET_GET_AVREG, 0xda, 0xff }, }; int tm6000_init (struct tm6000_core *dev) { int board, rc=0, i; int board, rc=0, i, size; struct reg_init *tab; if (dev->dev_type == TM6010) { tab = tm6010_init_tab; size = ARRAY_SIZE(tm6010_init_tab); } else { tab = tm6000_init_tab; size = ARRAY_SIZE(tm6000_init_tab); } /* Load board's initialization table */ for (i=0; i< ARRAY_SIZE(init_tab); i++) { rc= tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, init_tab[i][0],init_tab[i][1]); for (i=0; i< size; i++) { rc= tm6000_set_reg (dev, tab[i].req, tab[i].reg, tab[i].val); if (rc<0) { printk (KERN_ERR "Error %i while setting reg %d to value %d\n", rc, init_tab[i][0],init_tab[i][1]); printk (KERN_ERR "Error %i while setting req %d, " "reg %d to value %d\n", rc, tab[i].req,tab[i].reg, tab[i].val); return rc; } } msleep(5); /* Just to be conservative */ /* Check board version - maybe 10Moons specific */ board=tm6000_get_reg16 (dev, 0x40, 0, 0); if (board >=0) { Loading @@ -328,19 +430,24 @@ int tm6000_init (struct tm6000_core *dev) printk (KERN_ERR "Error %i while retrieving board version\n",board); } tm6000_set_reg (dev, REQ_05_SET_GET_USBREG, 0x18, 0x00); msleep(5); /* Just to be conservative */ if (dev->dev_type == TM6010) { /* Turn xceive 3028 on */ tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6010_GPIO_3, 0x01); msleep(11); } /* Reset GPIO1 and GPIO4. */ for (i=0; i< 2; i++) { rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 0); rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, dev->tuner_reset_gpio, 0x00); if (rc<0) { printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc); return rc; } msleep(10); /* Just to be conservative */ rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_1, 1); rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, dev->tuner_reset_gpio, 0x01); if (rc<0) { printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc); return rc; Loading @@ -360,8 +467,12 @@ int tm6000_init (struct tm6000_core *dev) return rc; } if (!i) if (!i) { rc=tm6000_get_reg16(dev, 0x40,0,0); if (rc>=0) { printk ("board=%d\n", rc); } } } msleep(50); Loading
drivers/staging/tm6000/tm6000-regs.h +11 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,7 @@ #define TM6000_GPIO_CLK 0x101 #define TM6000_GPIO_DATA 0x100 #define TM6000_GPIO_1 0x102 #define TM6000_GPIO_2 0x103 #define TM6000_GPIO_3 0x104 Loading @@ -62,6 +63,16 @@ #define TM6000_GPIO_6 0x304 #define TM6000_GPIO_7 0x305 /* tm6010 defines GPIO with different values */ #define TM6010_GPIO_0 0x0102 #define TM6010_GPIO_1 0x0103 #define TM6010_GPIO_2 0x0104 #define TM6010_GPIO_3 0x0105 #define TM6010_GPIO_4 0x0106 #define TM6010_GPIO_5 0x0107 #define TM6010_GPIO_6 0x0300 #define TM6010_GPIO_7 0x0301 #define TM6010_GPIO_9 0x0305 /* * Define TV Master TM5600/TM6000 URB message codes and length */ Loading
drivers/staging/tm6000/tm6000-stds.c +4 −6 Original line number Diff line number Diff line Loading @@ -781,11 +781,8 @@ static int tm6000_load_std(struct tm6000_core *dev, if (!set[i].req) return 0; /* FIXME: REQ 8 settings are for tm6010 not tested yet This doesn't work with tm5600 */ if (set[i].req == REQ_08_SET_GET_AVREG_BIT) if ((dev->dev_type != TM6010) && (set[i].req == REQ_08_SET_GET_AVREG_BIT)) continue; rc = tm6000_set_reg(dev, set[i].req, set[i].reg, set[i].value); Loading Loading @@ -871,5 +868,6 @@ int tm6000_set_standard(struct tm6000_core *dev, v4l2_std_id * norm) msleep(40); return 0; }
drivers/staging/tm6000/tm6000.h +6 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,11 @@ enum tm6000_itype { TM6000_INPUT_SVIDEO, }; enum tm6000_devtype { TM6000 = 0, TM5600, TM6010, }; /* ------------------------------------------------------------------ Basic structures Loading Loading @@ -121,6 +126,7 @@ struct tm6000_core { char name[30]; /* name (including minor) of the device */ int model; /* index in the device_data struct */ int devno; /* marks the number of this device */ enum tm6000_devtype dev_type; /* type of device */ v4l2_std_id norm; /* Current norm */ int width,height; /* Selected resolution */ Loading