Commit 2a1cd3a8 authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Greg Kroah-Hartman
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staging: mt7621-pci: bindings: update doc accordly to last changes 



Properly update bindings documentation with added 'reset-gpios'
property. Delete also 'perst-gpio' which is not being used anymore.

Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20200313200913.24321-5-sergio.paracuellos@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f2bf0822

drivers/staging/mt7621-pci/mediatek,mt7621-pci.txt

+5 −2
Original line number Diff line number Diff line
@@ -6,7 +6,6 @@ Required properties: 
- reg: Base addresses and lengths of the PCIe subsys and root ports.

- bus-range: Range of bus numbers associated with this controller.

- #address-cells: Address representation for root ports (must be 3)

- perst-gpio: PCIe reset signal line.

- pinctrl-names : The pin control state names.

- pinctrl-0: The "default" pinctrl state.

- #size-cells: Size representation for root ports (must be 2)
@@ -24,6 +23,7 @@ Required properties: 
  See ../clocks/clock-bindings.txt for details.

- clock-names: Must be "pcie0", "pcie1", "pcieN"... based on the number of

  root ports.

- reset-gpios: GPIO specs for the reset pins.



In addition, the device tree node must have sub-nodes describing each PCIe port

interface, having the following mandatory properties:
@@ -49,7 +49,6 @@ Example for MT7621: 
		#address-cells = <3>;

		#size-cells = <2>;



		perst-gpio = <&gpio 19 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&pcie_pins>;
@@ -74,6 +73,10 @@ Example for MT7621: 
		clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;

		clock-names = "pcie0", "pcie1", "pcie2";



		reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,

				<&gpio 8 GPIO_ACTIVE_LOW>,

				<&gpio 7 GPIO_ACTIVE_LOW>;



		pcie@0,0 {

			reg = <0x0000 0 0 0 0>;

			#address-cells = <3>;