Commit 2b3a1f51 authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher
Browse files

drm/amdgpu:Add pcie gen5 support in pcie capability. 



Add PCIE_SPEED_32_0GT and PCIE GEN5 support for amdgpu.

Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 366468ff

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+14 −2
Original line number Diff line number Diff line
@@ -4793,7 +4793,13 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev) 
						  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 |

						  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3);

		} else {

			if (speed_cap == PCIE_SPEED_16_0GT)

			if (speed_cap == PCIE_SPEED_32_0GT)

				adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 |

							  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 |

							  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3 |

							  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN4 |

							  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN5);

			else if (speed_cap == PCIE_SPEED_16_0GT)

				adev->pm.pcie_gen_mask |= (CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN1 |

							  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2 |

							  CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3 |
@@ -4813,7 +4819,13 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev) 
			adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 |

						   CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2);

		} else {

			if (platform_speed_cap == PCIE_SPEED_16_0GT)

			if (platform_speed_cap == PCIE_SPEED_32_0GT)

				adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 |

							   CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |

							   CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3 |

							   CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4 |

							   CAIL_PCIE_LINK_SPEED_SUPPORT_GEN5);

			else if (platform_speed_cap == PCIE_SPEED_16_0GT)

				adev->pm.pcie_gen_mask |= (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1 |

							   CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |

							   CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3 |

drivers/gpu/drm/amd/include/amd_pcie.h

+2 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2        0x00020000

#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3        0x00040000

#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4        0x00080000

#define CAIL_PCIE_LINK_SPEED_SUPPORT_GEN5        0x00100000

#define CAIL_PCIE_LINK_SPEED_SUPPORT_MASK        0xFFFF0000

#define CAIL_PCIE_LINK_SPEED_SUPPORT_SHIFT       16
@@ -36,6 +37,7 @@ 
#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN2   0x00000002

#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN3   0x00000004

#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN4   0x00000008

#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_GEN5   0x00000010

#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_MASK   0x0000FFFF

#define CAIL_ASIC_PCIE_LINK_SPEED_SUPPORT_SHIFT  0