Merge branch 'omap-for-v4.10/cpuidle-v2' into omap-for-v4.10/soc (2bb6375f) · Commits · jan.koester / Linux

arch/arm/mach-omap2/Makefile

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -80,7 +80,7 @@ endif
	# Power Management		# Power Management
	omap-4-5-pm-common = omap-mpuss-lowpower.o		omap-4-5-pm-common = omap-mpuss-lowpower.o
	obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common)		obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common)
	obj-$(CONFIG_ARCH_OMAP5) += $(omap-4-5-pm-common)		obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-pm-common)
	obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o		obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o

	ifeq ($(CONFIG_PM),y)		ifeq ($(CONFIG_PM),y)

arch/arm/mach-omap2/common.h

+29 −9

Original line number	Original line	Diff line number	Diff line
	@@ -262,8 +262,6 @@ extern void __iomem *omap4_get_sar_ram_base(void);
	extern void omap4_mpuss_early_init(void);		extern void omap4_mpuss_early_init(void);
	extern void omap_do_wfi(void);		extern void omap_do_wfi(void);

	extern void omap4_secondary_startup(void);
	extern void omap4460_secondary_startup(void);

	#ifdef CONFIG_SMP		#ifdef CONFIG_SMP
	/* Needed for secondary core boot */		/* Needed for secondary core boot */
	@@ -275,16 +273,11 @@ extern void omap4_cpu_die(unsigned int cpu);
	extern int omap4_cpu_kill(unsigned int cpu);		extern int omap4_cpu_kill(unsigned int cpu);

	extern const struct smp_operations omap4_smp_ops;		extern const struct smp_operations omap4_smp_ops;

	extern void omap5_secondary_startup(void);
	extern void omap5_secondary_hyp_startup(void);
	#endif		#endif

	#if defined(CONFIG_SMP) && defined(CONFIG_PM)		#if defined(CONFIG_SMP) && defined(CONFIG_PM)
	extern int omap4_mpuss_init(void);		extern int omap4_mpuss_init(void);
	extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);		extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
	extern int omap4_finish_suspend(unsigned long cpu_state);
	extern void omap4_cpu_resume(void);
	extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);		extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
	#else		#else
	static inline int omap4_enter_lowpower(unsigned int cpu,		static inline int omap4_enter_lowpower(unsigned int cpu,
	@@ -305,14 +298,41 @@ static inline int omap4_mpuss_init(void)
	return 0;		return 0;
	}		}

			#endif

			#ifdef CONFIG_ARCH_OMAP4
			void omap4_secondary_startup(void);
			void omap4460_secondary_startup(void);
			int omap4_finish_suspend(unsigned long cpu_state);
			void omap4_cpu_resume(void);
			#else
			static inline void omap4_secondary_startup(void)
			{
			}

			static inline void omap4460_secondary_startup(void)
			{
			}
	static inline int omap4_finish_suspend(unsigned long cpu_state)		static inline int omap4_finish_suspend(unsigned long cpu_state)
	{		{
	return 0;		return 0;
	}		}

	static inline void omap4_cpu_resume(void)		static inline void omap4_cpu_resume(void)
	{}		{
			}
			#endif

			#if defined(CONFIG_SOC_OMAP5) \|\| defined(CONFIG_SOC_DRA7XX)
			void omap5_secondary_startup(void);
			void omap5_secondary_hyp_startup(void);
			#else
			static inline void omap5_secondary_startup(void)
			{
			}

			static inline void omap5_secondary_hyp_startup(void)
			{
			}
	#endif		#endif

	void pdata_quirks_init(const struct of_device_id *);		void pdata_quirks_init(const struct of_device_id *);

arch/arm/mach-omap2/cpuidle44xx.c

+79 −1

Original line number	Original line	Diff line number	Diff line
	@@ -21,6 +21,7 @@
	#include "common.h"		#include "common.h"
	#include "pm.h"		#include "pm.h"
	#include "prm.h"		#include "prm.h"
			#include "soc.h"
	#include "clockdomain.h"		#include "clockdomain.h"

	#define MAX_CPUS 2		#define MAX_CPUS 2
	@@ -30,6 +31,7 @@ struct idle_statedata {
	u32 cpu_state;		u32 cpu_state;
	u32 mpu_logic_state;		u32 mpu_logic_state;
	u32 mpu_state;		u32 mpu_state;
			u32 mpu_state_vote;
	};		};

	static struct idle_statedata omap4_idle_data[] = {		static struct idle_statedata omap4_idle_data[] = {
	@@ -50,12 +52,26 @@ static struct idle_statedata omap4_idle_data[] = {
	},		},
	};		};

			static struct idle_statedata omap5_idle_data[] = {
			{
			.cpu_state = PWRDM_POWER_ON,
			.mpu_state = PWRDM_POWER_ON,
			.mpu_logic_state = PWRDM_POWER_ON,
			},
			{
			.cpu_state = PWRDM_POWER_RET,
			.mpu_state = PWRDM_POWER_RET,
			.mpu_logic_state = PWRDM_POWER_RET,
			},
			};

	static struct powerdomain mpu_pd, cpu_pd[MAX_CPUS];		static struct powerdomain mpu_pd, cpu_pd[MAX_CPUS];
	static struct clockdomain *cpu_clkdm[MAX_CPUS];		static struct clockdomain *cpu_clkdm[MAX_CPUS];

	static atomic_t abort_barrier;		static atomic_t abort_barrier;
	static bool cpu_done[MAX_CPUS];		static bool cpu_done[MAX_CPUS];
	static struct idle_statedata *state_ptr = &omap4_idle_data[0];		static struct idle_statedata *state_ptr = &omap4_idle_data[0];
			static DEFINE_RAW_SPINLOCK(mpu_lock);

	/* Private functions */		/* Private functions */

	@@ -77,6 +93,32 @@ static int omap_enter_idle_simple(struct cpuidle_device *dev,
	return index;		return index;
	}		}

			static int omap_enter_idle_smp(struct cpuidle_device *dev,
			struct cpuidle_driver *drv,
			int index)
			{
			struct idle_statedata *cx = state_ptr + index;
			unsigned long flag;

			raw_spin_lock_irqsave(&mpu_lock, flag);
			cx->mpu_state_vote++;
			if (cx->mpu_state_vote == num_online_cpus()) {
			pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
			omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
			}
			raw_spin_unlock_irqrestore(&mpu_lock, flag);

			omap4_enter_lowpower(dev->cpu, cx->cpu_state);

			raw_spin_lock_irqsave(&mpu_lock, flag);
			if (cx->mpu_state_vote == num_online_cpus())
			omap_set_pwrdm_state(mpu_pd, PWRDM_POWER_ON);
			cx->mpu_state_vote--;
			raw_spin_unlock_irqrestore(&mpu_lock, flag);

			return index;
			}

	static int omap_enter_idle_coupled(struct cpuidle_device *dev,		static int omap_enter_idle_coupled(struct cpuidle_device *dev,
	struct cpuidle_driver *drv,		struct cpuidle_driver *drv,
	int index)		int index)
	@@ -220,6 +262,32 @@ static struct cpuidle_driver omap4_idle_driver = {
	.safe_state_index = 0,		.safe_state_index = 0,
	};		};

			static struct cpuidle_driver omap5_idle_driver = {
			.name = "omap5_idle",
			.owner = THIS_MODULE,
			.states = {
			{
			/* C1 - CPU0 ON + CPU1 ON + MPU ON */
			.exit_latency = 2 + 2,
			.target_residency = 5,
			.enter = omap_enter_idle_simple,
			.name = "C1",
			.desc = "CPUx WFI, MPUSS ON"
			},
			{
			/* C2 - CPU0 RET + CPU1 RET + MPU CSWR */
			.exit_latency = 48 + 60,
			.target_residency = 100,
			.flags = CPUIDLE_FLAG_TIMER_STOP,
			.enter = omap_enter_idle_smp,
			.name = "C2",
			.desc = "CPUx CSWR, MPUSS CSWR",
			},
			},
			.state_count = ARRAY_SIZE(omap5_idle_data),
			.safe_state_index = 0,
			};

	/* Public functions */		/* Public functions */

	/**		/**
	@@ -230,6 +298,16 @@ static struct cpuidle_driver omap4_idle_driver = {
	*/		*/
	int __init omap4_idle_init(void)		int __init omap4_idle_init(void)
	{		{
			struct cpuidle_driver *idle_driver;

			if (soc_is_omap54xx()) {
			state_ptr = &omap5_idle_data[0];
			idle_driver = &omap5_idle_driver;
			} else {
			state_ptr = &omap4_idle_data[0];
			idle_driver = &omap4_idle_driver;
			}

	mpu_pd = pwrdm_lookup("mpu_pwrdm");		mpu_pd = pwrdm_lookup("mpu_pwrdm");
	cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");		cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
	cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");		cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
	@@ -244,5 +322,5 @@ int __init omap4_idle_init(void)
	/* Configure the broadcast timer on each cpu */		/* Configure the broadcast timer on each cpu */
	on_each_cpu(omap_setup_broadcast_timer, NULL, 1);		on_each_cpu(omap_setup_broadcast_timer, NULL, 1);

	return cpuidle_register(&omap4_idle_driver, cpu_online_mask);		return cpuidle_register(idle_driver, cpu_online_mask);
	}		}

arch/arm/mach-omap2/io.c

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -717,10 +717,11 @@ void __init omap5_init_early(void)
	OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));		OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));		omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
	omap2_control_base_init();		omap2_control_base_init();
	omap4_pm_init_early();
	omap2_prcm_base_init();		omap2_prcm_base_init();
	omap5xxx_check_revision();		omap5xxx_check_revision();
	omap4_sar_ram_init();		omap4_sar_ram_init();
			omap4_mpuss_early_init();
			omap4_pm_init_early();
	omap54xx_voltagedomains_init();		omap54xx_voltagedomains_init();
	omap54xx_powerdomains_init();		omap54xx_powerdomains_init();
	omap54xx_clockdomains_init();		omap54xx_clockdomains_init();

arch/arm/mach-omap2/omap-mpuss-lowpower.c

+27 −10

Original line number	Original line	Diff line number	Diff line
	@@ -48,6 +48,7 @@
	#include <asm/smp_scu.h>		#include <asm/smp_scu.h>
	#include <asm/pgalloc.h>		#include <asm/pgalloc.h>
	#include <asm/suspend.h>		#include <asm/suspend.h>
			#include <asm/virt.h>
	#include <asm/hardware/cache-l2x0.h>		#include <asm/hardware/cache-l2x0.h>

	#include "soc.h"		#include "soc.h"
	@@ -244,10 +245,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
	save_state = 1;		save_state = 1;
	break;		break;
	case PWRDM_POWER_RET:		case PWRDM_POWER_RET:
	if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) {		if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
	save_state = 0;		save_state = 0;
	break;		break;
	}
	default:		default:
	/*		/*
	* CPUx CSWR is invalid hardware state. Also CPUx OSWR		* CPUx CSWR is invalid hardware state. Also CPUx OSWR
	@@ -371,8 +371,12 @@ int __init omap4_mpuss_init(void)
	pm_info = &per_cpu(omap4_pm_info, 0x0);		pm_info = &per_cpu(omap4_pm_info, 0x0);
	if (sar_base) {		if (sar_base) {
	pm_info->scu_sar_addr = sar_base + SCU_OFFSET0;		pm_info->scu_sar_addr = sar_base + SCU_OFFSET0;
			if (cpu_is_omap44xx())
	pm_info->wkup_sar_addr = sar_base +		pm_info->wkup_sar_addr = sar_base +
	CPU0_WAKEUP_NS_PA_ADDR_OFFSET;		CPU0_WAKEUP_NS_PA_ADDR_OFFSET;
			else
			pm_info->wkup_sar_addr = sar_base +
			OMAP5_CPU0_WAKEUP_NS_PA_ADDR_OFFSET;
	pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0;		pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET0;
	}		}
	pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm");		pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm");
	@@ -391,8 +395,12 @@ int __init omap4_mpuss_init(void)
	pm_info = &per_cpu(omap4_pm_info, 0x1);		pm_info = &per_cpu(omap4_pm_info, 0x1);
	if (sar_base) {		if (sar_base) {
	pm_info->scu_sar_addr = sar_base + SCU_OFFSET1;		pm_info->scu_sar_addr = sar_base + SCU_OFFSET1;
			if (cpu_is_omap44xx())
	pm_info->wkup_sar_addr = sar_base +		pm_info->wkup_sar_addr = sar_base +
	CPU1_WAKEUP_NS_PA_ADDR_OFFSET;		CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
			else
			pm_info->wkup_sar_addr = sar_base +
			OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
	pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1;		pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1;
	}		}

	@@ -453,15 +461,24 @@ void __init omap4_mpuss_early_init(void)
	{		{
	unsigned long startup_pa;		unsigned long startup_pa;

	if (!cpu_is_omap44xx())		if (!(cpu_is_omap44xx() \|\| soc_is_omap54xx()))
	return;		return;

	sar_base = omap4_get_sar_ram_base();		sar_base = omap4_get_sar_ram_base();

	if (cpu_is_omap443x())		if (cpu_is_omap443x())
	startup_pa = virt_to_phys(omap4_secondary_startup);		startup_pa = virt_to_phys(omap4_secondary_startup);
	else		else if (cpu_is_omap446x())
	startup_pa = virt_to_phys(omap4460_secondary_startup);		startup_pa = virt_to_phys(omap4460_secondary_startup);
			else if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
			startup_pa = virt_to_phys(omap5_secondary_hyp_startup);
			else
			startup_pa = virt_to_phys(omap5_secondary_startup);

	writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET);		if (cpu_is_omap44xx())
			writel_relaxed(startup_pa, sar_base +
			CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
			else
			writel_relaxed(startup_pa, sar_base +
			OMAP5_CPU1_WAKEUP_NS_PA_ADDR_OFFSET);
	}		}