Commit 2c16be66 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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ARM: tegra: Add Memory Client resets to Tegra30 GR2D, GR3D and Host1x 



Memory access must be blocked before hardware reset is asserted and before
power is gated, otherwise a serious hardware fault is inevitable. Add
reset for memory clients to the GR2D, GR3D and Host1x nodes.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 1caf3ef4

arch/arm/boot/dts/tegra30.dtsi

+8 −6
Original line number Diff line number Diff line
@@ -123,8 +123,8 @@ host1x@50000000 { 
		interrupt-names = "syncpt", "host1x";

		clocks = <&tegra_car TEGRA30_CLK_HOST1X>;

		clock-names = "host1x";

		resets = <&tegra_car 28>;

		reset-names = "host1x";

		resets = <&tegra_car 28>, <&mc TEGRA30_MC_RESET_HC>;

		reset-names = "host1x", "mc";

		iommus = <&mc TEGRA_SWGROUP_HC>;

		power-domains = <&pd_heg>;

		operating-points-v2 = <&host1x_dvfs_opp_table>;
@@ -190,8 +190,8 @@ gr2d@54140000 { 
			reg = <0x54140000 0x00040000>;

			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&tegra_car TEGRA30_CLK_GR2D>;

			resets = <&tegra_car 21>;

			reset-names = "2d";

			resets = <&tegra_car 21>, <&mc TEGRA30_MC_RESET_2D>;

			reset-names = "2d", "mc";

			power-domains = <&pd_heg>;

			operating-points-v2 = <&gr2d_dvfs_opp_table>;
@@ -205,8 +205,10 @@ gr3d@54180000 { 
				 <&tegra_car TEGRA30_CLK_GR3D2>;

			clock-names = "3d", "3d2";

			resets = <&tegra_car 24>,

				 <&tegra_car 98>;

			reset-names = "3d", "3d2";

				 <&tegra_car 98>,

				 <&mc TEGRA30_MC_RESET_3D>,

				 <&mc TEGRA30_MC_RESET_3D2>;

			reset-names = "3d", "3d2", "mc", "mc2";

			power-domains = <&pd_3d0>, <&pd_3d1>;

			power-domain-names = "3d0", "3d1";

			operating-points-v2 = <&gr3d_dvfs_opp_table>;