Unverified Commit 2cdba9b0 authored by Lucas Tanure's avatar Lucas Tanure Committed by Mark Brown
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ASoC: cs42l42: Use bclk from hw_params if set_sysclk was not called



Add support for reading the source clock from snd_soc_params_to_bclk
so the machine driver is not required to call cs42l42_set_sysclk

Signed-off-by: default avatarLucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210306185553.62053-13-tanureal@opensource.cirrus.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent c5b8ee08
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+13 −4
Original line number Diff line number Diff line
@@ -588,10 +588,16 @@ static int cs42l42_pll_config(struct snd_soc_component *component)
{
	struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
	int i;
	u32 clk;
	u32 fsync;

	if (!cs42l42->sclk)
		clk = cs42l42->bclk;
	else
		clk = cs42l42->sclk;

	for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) {
		if (pll_ratio_table[i].sclk == cs42l42->sclk) {
		if (pll_ratio_table[i].sclk == clk) {
			/* Configure the internal sample rate */
			snd_soc_component_update_bits(component, CS42L42_MCLK_CTL,
					CS42L42_INTERNAL_FS_MASK,
@@ -611,12 +617,12 @@ static int cs42l42_pll_config(struct snd_soc_component *component)
					(pll_ratio_table[i].mclk_div <<
					CS42L42_MCLKDIV_SHIFT));
			/* Set up the LRCLK */
			fsync = cs42l42->sclk / cs42l42->srate;
			if (((fsync * cs42l42->srate) != cs42l42->sclk)
			fsync = clk / cs42l42->srate;
			if (((fsync * cs42l42->srate) != clk)
				|| ((fsync % 2) != 0)) {
				dev_err(component->dev,
					"Unsupported sclk %d/sample rate %d\n",
					cs42l42->sclk,
					clk,
					cs42l42->srate);
				return -EINVAL;
			}
@@ -788,6 +794,7 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
	unsigned int val = 0;

	cs42l42->srate = params_rate(params);
	cs42l42->bclk = snd_soc_params_to_bclk(params);

	switch(substream->stream) {
	case SNDRV_PCM_STREAM_CAPTURE:
@@ -921,6 +928,8 @@ static struct snd_soc_dai_driver cs42l42_dai = {
			.rates = SNDRV_PCM_RATE_8000_192000,
			.formats = CS42L42_FORMATS,
		},
		.symmetric_rate = 1,
		.symmetric_sample_bits = 1,
		.ops = &cs42l42_ops,
};

+1 −0
Original line number Diff line number Diff line
@@ -771,6 +771,7 @@ struct cs42l42_private {
	struct gpio_desc *reset_gpio;
	struct completion pdn_done;
	struct snd_soc_jack jack;
	int bclk;
	u32 sclk;
	u32 srate;
	u8 plug_state;