Commit 2cf1c348 authored by John Crispin's avatar John Crispin Committed by Matthias Brugger
Browse files

ARM: Add basic support for Airoha EN7523 SoC 



EN7523 is an armv8 based silicon used inside broadband access type devices
such as xPON and xDSL. It shares various silicon blocks with MediaTek
silicon such as the MT7622.

Add basic support for Airoha EN7523, enough for booting to console.

The UART is basically 8250-compatible, except for the clock selection.
A clock-frequency value is synthesized to get this to run at 115200 bps.

Signed-off-by: default avatarJohn Crispin <john@phrozen.org>
Signed-off-by: default avatarBert Vermeulen <bert@biot.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220130145116.88406-4-nbd@nbd.name


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 51911d1c

arch/arm/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -572,6 +572,18 @@ config ARCH_VIRT 
	select HAVE_ARM_ARCH_TIMER

	select ARCH_SUPPORTS_BIG_ENDIAN



config ARCH_AIROHA

	bool "Airoha SoC Support"

	depends on ARCH_MULTI_V7

	select ARM_AMBA

	select ARM_GIC

	select ARM_GIC_V3

	select ARM_PSCI

	select HAVE_ARM_ARCH_TIMER

	select COMMON_CLK

	help

	  Support for Airoha EN7523 SoCs



#

# This is sorted alphabetically by mach-* pathname.  However, plat-*

# Kconfigs may be included either alphabetically (according to the

arch/arm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -160,6 +160,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 
# Machine directory name.  This list is sorted alphanumerically

# by CONFIG_* macro name.

machine-$(CONFIG_ARCH_ACTIONS)		+= actions

machine-$(CONFIG_ARCH_AIROHA)		+= airoha

machine-$(CONFIG_ARCH_ALPINE)		+= alpine

machine-$(CONFIG_ARCH_ARTPEC)		+= artpec

machine-$(CONFIG_ARCH_ASPEED)           += aspeed

arch/arm/boot/dts/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -187,6 +187,8 @@ dtb-$(CONFIG_ARCH_DAVINCI) += \ 
	da850-lego-ev3.dtb

dtb-$(CONFIG_ARCH_DIGICOLOR) += \

	cx92755_equinox.dtb

dtb-$(CONFIG_ARCH_AIROHA) += \

	en7523-evb.dtb

dtb-$(CONFIG_ARCH_EXYNOS3) += \

	exynos3250-artik5-eval.dtb \

	exynos3250-monk.dtb \

arch/arm/boot/dts/en7523-evb.dts

0 → 100644
+27 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

/dts-v1/;



/* Bootloader installs ATF here */

/memreserve/ 0x80000000 0x200000;



#include "en7523.dtsi"



/ {

	model = "Airoha EN7523 Evaluation Board";

	compatible = "airoha,en7523-evb", "airoha,en7523";



	aliases {

		serial0 = &uart1;

	};



	chosen {

		bootargs = "console=ttyS0,115200 earlycon";

		stdout-path = "serial0:115200n8";

		linux,usable-memory-range = <0x80200000 0x1fe00000>;

	};



	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x20000000>;

	};

};

arch/arm/boot/dts/en7523.dtsi

0 → 100644
+117 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)



#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {

	interrupt-parent = <&gic>;

	#address-cells = <1>;

	#size-cells = <1>;



	reserved-memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		npu_binary@84000000 {

			no-map;

			reg = <0x84000000 0xA00000>;

		};



		npu_flag@84B0000 {

			no-map;

			reg = <0x84B00000 0x100000>;

		};



		npu_pkt@85000000 {

			no-map;

			reg = <0x85000000 0x1A00000>;

		};



		npu_phyaddr@86B00000 {

			no-map;

			reg = <0x86B00000 0x100000>;

		};



		npu_rxdesc@86D00000 {

			no-map;

			reg = <0x86D00000 0x100000>;

		};

	};



	psci {

		compatible = "arm,psci-0.2";

		method = "smc";

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu-map {

			cluster0 {

				core0 {

					cpu = <&cpu0>;

				};

				core1 {

					cpu = <&cpu1>;

				};

			};

		};



		cpu0: cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x0>;

			enable-method = "psci";

			clock-frequency = <80000000>;

			next-level-cache = <&L2_0>;

		};



		cpu1: cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a53";

			reg = <0x1>;

			enable-method = "psci";

			clock-frequency = <80000000>;

			next-level-cache = <&L2_0>;

		};



		L2_0: l2-cache0 {

			compatible = "cache";

		};

	};



	gic: interrupt-controller@9000000 {

		compatible = "arm,gic-v3";

		interrupt-controller;

		#interrupt-cells = <3>;

		#address-cells = <1>;

		#size-cells = <1>;

		reg = <0x09000000 0x20000>,

		      <0x09080000 0x80000>,

		      <0x09400000 0x2000>,

		      <0x09500000 0x2000>,

		      <0x09600000 0x20000>;

		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupt-parent = <&gic>;

		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,

			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;

	};



	uart1: serial@1fbf0000 {

		compatible = "ns16550";

		reg = <0x1fbf0000 0x30>;

		reg-io-width = <4>;

		reg-shift = <2>;

		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;

		clock-frequency = <1843200>;

		status = "okay";

	};

};