dt-bindings: perf: Convert Arm DSU to schema

* ARM DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)

ARM DyanmIQ Shared Unit (DSU) integrates one or more CPU cores

with a shared L3 memory system, control logic and external interfaces to

form a multicore cluster. The PMU enables to gather various statistics on

the operations of the DSU. The PMU provides independent 32bit counters that

can count any of the supported events, along with a 64bit cycle counter.

The PMU is accessed via CPU system registers and has no MMIO component.

** DSU PMU required properties:

- compatible	: should be one of :

		"arm,dsu-pmu"

- interrupts	: Exactly 1 SPI must be listed.

- cpus		: List of phandles for the CPUs connected to this DSU instance.

** Example:

dsu-pmu-0 {

	compatible = "arm,dsu-pmu";

	interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>;

	cpus = <&cpu_0>, <&cpu_1>;

};

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright 2021 Arm Ltd.

%YAML 1.2

---

$id: http://devicetree.org/schemas/perf/arm,dsu-pmu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ARM DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)

maintainers:

  - Suzuki K Poulose <suzuki.poulose@arm.com>

  - Robin Murphy <robin.murphy@arm.com>

description:

  ARM DynamIQ Shared Unit (DSU) integrates one or more CPU cores with a shared

  L3 memory system, control logic and external interfaces to form a multicore

  cluster. The PMU enables gathering various statistics on the operation of the

  DSU. The PMU provides independent 32-bit counters that can count any of the

  supported events, along with a 64-bit cycle counter. The PMU is accessed via

  CPU system registers and has no MMIO component.

properties:

  compatible:

    const: arm,dsu-pmu

  interrupts:

    items:

      - description: nCLUSTERPMUIRQ interrupt

  cpus:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    minItems: 1

    maxItems: 8

    description: List of phandles for the CPUs connected to this DSU instance.

required:

  - compatible

  - interrupts

  - cpus

additionalProperties: false