Commit 2d2a2900 authored by Rex-BC Chen's avatar Rex-BC Chen Committed by Stephen Boyd
Browse files

clk: mediatek: reset: Revise structure to control reset register 



To declare the reset data easier, we add a strucure to do this instead
of using many input variables to mtk_register_reset_controller().

- Add mtk_clk_rst_desc to define the reset description when registering
  the reset controller.
- Rename "mtk_reset" to "mtk_clk_rst_data". We use it to store data of
  reset controller.
- Document mtk_clk_rst_desc and mtk_clk_rst_data.
- Modify the documentation of mtk_register_reset_controller.
- Extract container_of in update functions to to_mtk_clk_rst_data().

Signed-off-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220523093346.28493-7-rex-bc.chen@mediatek.com


Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 370bf628

drivers/clk/mediatek/clk-mt2701-eth.c

+7 −1
Original line number Original line Diff line number Diff line
@@ -36,6 +36,12 @@ static const struct mtk_gate eth_clks[] = { 
	GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29),

	GATE_ETH(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29),

};

};





static const struct mtk_clk_rst_desc clk_rst_desc = {

	.version = MTK_RST_SIMPLE,

	.rst_bank_nr = 1,

	.reg_ofs = 0x34,

};



static const struct of_device_id of_match_clk_mt2701_eth[] = {

static const struct of_device_id of_match_clk_mt2701_eth[] = {

	{ .compatible = "mediatek,mt2701-ethsys", },

	{ .compatible = "mediatek,mt2701-ethsys", },

	{}

	{}
@@ -58,7 +64,7 @@ static int clk_mt2701_eth_probe(struct platform_device *pdev) 
			"could not register clock provider: %s: %d\n",

			"could not register clock provider: %s: %d\n",

			pdev->name, r);

			pdev->name, r);





	mtk_register_reset_controller(node, 1, 0x34, MTK_RST_SIMPLE);

	mtk_register_reset_controller(node, &clk_rst_desc);





	return r;

	return r;

}

}

drivers/clk/mediatek/clk-mt2701-g3d.c

+7 −1
Original line number Original line Diff line number Diff line
@@ -35,6 +35,12 @@ static const struct mtk_gate g3d_clks[] = { 
	GATE_G3D(CLK_G3DSYS_CORE, "g3d_core", "mfg_sel", 0),

	GATE_G3D(CLK_G3DSYS_CORE, "g3d_core", "mfg_sel", 0),

};

};





static const struct mtk_clk_rst_desc clk_rst_desc = {

	.version = MTK_RST_SIMPLE,

	.rst_bank_nr = 1,

	.reg_ofs = 0xc,

};



static int clk_mt2701_g3dsys_init(struct platform_device *pdev)

static int clk_mt2701_g3dsys_init(struct platform_device *pdev)

{

{

	struct clk_hw_onecell_data *clk_data;

	struct clk_hw_onecell_data *clk_data;
@@ -52,7 +58,7 @@ static int clk_mt2701_g3dsys_init(struct platform_device *pdev) 
			"could not register clock provider: %s: %d\n",

			"could not register clock provider: %s: %d\n",

			pdev->name, r);

			pdev->name, r);





	mtk_register_reset_controller(node, 1, 0xc, MTK_RST_SIMPLE);

	mtk_register_reset_controller(node, &clk_rst_desc);





	return r;

	return r;

}

}

drivers/clk/mediatek/clk-mt2701-hif.c

+7 −1
Original line number Original line Diff line number Diff line
@@ -33,6 +33,12 @@ static const struct mtk_gate hif_clks[] = { 
	GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26),

	GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26),

};

};





static const struct mtk_clk_rst_desc clk_rst_desc = {

	.version = MTK_RST_SIMPLE,

	.rst_bank_nr = 1,

	.reg_ofs = 0x34,

};



static const struct of_device_id of_match_clk_mt2701_hif[] = {

static const struct of_device_id of_match_clk_mt2701_hif[] = {

	{ .compatible = "mediatek,mt2701-hifsys", },

	{ .compatible = "mediatek,mt2701-hifsys", },

	{}

	{}
@@ -57,7 +63,7 @@ static int clk_mt2701_hif_probe(struct platform_device *pdev) 
		return r;

		return r;

	}

	}





	mtk_register_reset_controller(node, 1, 0x34, MTK_RST_SIMPLE);

	mtk_register_reset_controller(node, &clk_rst_desc);





	return 0;

	return 0;

}

}

drivers/clk/mediatek/clk-mt2701.c

+17 −2
Original line number Original line Diff line number Diff line
@@ -735,6 +735,21 @@ static const struct mtk_fixed_factor infra_fixed_divs[] = { 
	FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2),

	FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2),

};

};





static const struct mtk_clk_rst_desc clk_rst_desc[] = {

	/* infrasys */

	{

		.version = MTK_RST_SIMPLE,

		.rst_bank_nr = 2,

		.reg_ofs = 0x30,

	},

	/* pericfg */

	{

		.version = MTK_RST_SIMPLE,

		.rst_bank_nr = 2,

		.reg_ofs = 0x0,

	},

};



static struct clk_hw_onecell_data *infra_clk_data;

static struct clk_hw_onecell_data *infra_clk_data;





static void __init mtk_infrasys_init_early(struct device_node *node)

static void __init mtk_infrasys_init_early(struct device_node *node)
@@ -787,7 +802,7 @@ static int mtk_infrasys_init(struct platform_device *pdev) 
	if (r)

	if (r)

		return r;

		return r;





	mtk_register_reset_controller(node, 2, 0x30, MTK_RST_SIMPLE);

	mtk_register_reset_controller(node, &clk_rst_desc[0]);





	return 0;

	return 0;

}

}
@@ -910,7 +925,7 @@ static int mtk_pericfg_init(struct platform_device *pdev) 
	if (r)

	if (r)

		return r;

		return r;





	mtk_register_reset_controller(node, 2, 0x0, MTK_RST_SIMPLE);

	mtk_register_reset_controller(node, &clk_rst_desc[1]);





	return 0;

	return 0;

}

}

drivers/clk/mediatek/clk-mt2712.c

+17 −2
Original line number Original line Diff line number Diff line
@@ -1258,6 +1258,21 @@ static const struct mtk_pll_data plls[] = { 
		0, 31, 0x0300, 4, 0, 0, 0, 0x0304, 0),

		0, 31, 0x0300, 4, 0, 0, 0, 0x0304, 0),

};

};





static const struct mtk_clk_rst_desc clk_rst_desc[] = {

	/* infra */

	{

		.version = MTK_RST_SIMPLE,

		.rst_bank_nr = 2,

		.reg_ofs = 0x30,

	},

	/* peri */

	{

		.version = MTK_RST_SIMPLE,

		.rst_bank_nr = 2,

		.reg_ofs = 0x0,

	},

};



static int clk_mt2712_apmixed_probe(struct platform_device *pdev)

static int clk_mt2712_apmixed_probe(struct platform_device *pdev)

{

{

	struct clk_hw_onecell_data *clk_data;

	struct clk_hw_onecell_data *clk_data;
@@ -1361,7 +1376,7 @@ static int clk_mt2712_infra_probe(struct platform_device *pdev) 
		pr_err("%s(): could not register clock provider: %d\n",

		pr_err("%s(): could not register clock provider: %d\n",

			__func__, r);

			__func__, r);





	mtk_register_reset_controller(node, 2, 0x30, MTK_RST_SIMPLE);

	mtk_register_reset_controller(node, &clk_rst_desc[0]);





	return r;

	return r;

}

}
@@ -1383,7 +1398,7 @@ static int clk_mt2712_peri_probe(struct platform_device *pdev) 
		pr_err("%s(): could not register clock provider: %d\n",

		pr_err("%s(): could not register clock provider: %d\n",

			__func__, r);

			__func__, r);





	mtk_register_reset_controller(node, 2, 0, MTK_RST_SIMPLE);

	mtk_register_reset_controller(node, &clk_rst_desc[1]);





	return r;

	return r;

}

}