Loading arch/blackfin/Kconfig +39 −9 Original line number Diff line number Diff line Loading @@ -77,6 +77,26 @@ choice prompt "CPU" default BF533 config BF512 bool "BF512" help BF512 Processor Support. config BF514 bool "BF514" help BF514 Processor Support. config BF516 bool "BF516" help BF516 Processor Support. config BF518 bool "BF518" help BF518 Processor Support. config BF522 bool "BF522" help Loading Loading @@ -181,27 +201,27 @@ endchoice config BF_REV_MIN int default 0 if (BF52x || BF54x) default 0 if (BF51x || BF52x || BF54x) default 2 if (BF537 || BF536 || BF534) default 3 if (BF561 ||BF533 || BF532 || BF531) default 4 if (BF538 || BF539) config BF_REV_MAX int default 2 if (BF52x || BF54x) default 2 if (BF51x || BF52x || BF54x) default 3 if (BF537 || BF536 || BF534) default 5 if (BF561 || BF538 || BF539) default 6 if (BF533 || BF532 || BF531) choice prompt "Silicon Rev" default BF_REV_0_1 if (BF52x || BF54x) default BF_REV_0_1 if (BF51x || BF52x || BF54x) default BF_REV_0_2 if (BF534 || BF536 || BF537) default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561) config BF_REV_0_0 bool "0.0" depends on (BF52x || BF54x) depends on (BF51x || BF52x || BF54x) config BF_REV_0_1 bool "0.1" Loading Loading @@ -235,6 +255,11 @@ config BF_REV_NONE endchoice config BF51x bool depends on (BF512 || BF514 || BF516 || BF518) default y config BF52x bool depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527) Loading Loading @@ -282,6 +307,7 @@ config MEM_MT48LC32M16A2TG_75 depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP || BFIN526_EZBRD) default y source "arch/blackfin/mach-bf518/Kconfig" source "arch/blackfin/mach-bf527/Kconfig" source "arch/blackfin/mach-bf533/Kconfig" source "arch/blackfin/mach-bf561/Kconfig" Loading Loading @@ -330,7 +356,7 @@ config CLKIN_HZ int "Frequency of the crystal on the board in Hz" default "11059200" if BFIN533_STAMP default "27000000" if BFIN533_EZKIT default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN538_EZKIT) default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN538_EZKIT || BFIN518F-EZBRD) default "30000000" if BFIN561_EZKIT default "24576000" if PNAV10 default "10000000" if BFIN532_IP0X Loading Loading @@ -370,7 +396,7 @@ config VCO_MULT default "22" if BFIN533_BLUETECHNIX_CM default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM) default "20" if BFIN561_EZKIT default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD) default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN518F_EZBRD) help This controls the frequency of the on-chip PLL. This can be between 1 and 64. PLL Frequency = (Crystal Frequency) * (this setting) Loading Loading @@ -432,6 +458,10 @@ config MAX_MEM_SIZE # config MAX_VCO_HZ int default 400000000 if BF512 default 400000000 if BF514 default 400000000 if BF516 default 400000000 if BF518 default 600000000 if BF522 default 400000000 if BF523 default 400000000 if BF524 Loading Loading @@ -1025,7 +1055,7 @@ comment "Possible Suspend Mem / Hibernate Wake-Up Sources" config PM_BFIN_WAKE_PH6 bool "Allow Wake-Up from on-chip PHY or PH6 GP" depends on PM && (BF52x || BF534 || BF536 || BF537) depends on PM && (BF51x || BF52x || BF534 || BF536 || BF537) default n help Enable PHY and PH6 GP Wake-Up (Voltage Regulator Power-Up) Loading arch/blackfin/Makefile +8 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,10 @@ KALLSYMS += --symbol-prefix=_ KBUILD_DEFCONFIG := BF537-STAMP_defconfig # setup the machine name and the machine dependent settings machine-$(CONFIG_BF512) := bf518 machine-$(CONFIG_BF514) := bf518 machine-$(CONFIG_BF516) := bf518 machine-$(CONFIG_BF518) := bf518 machine-$(CONFIG_BF522) := bf527 machine-$(CONFIG_BF523) := bf527 machine-$(CONFIG_BF524) := bf527 Loading @@ -44,6 +48,10 @@ machine-$(CONFIG_BF561) := bf561 MACHINE := $(machine-y) export MACHINE cpu-$(CONFIG_BF512) := bf512 cpu-$(CONFIG_BF514) := bf514 cpu-$(CONFIG_BF516) := bf516 cpu-$(CONFIG_BF518) := bf518 cpu-$(CONFIG_BF522) := bf522 cpu-$(CONFIG_BF523) := bf523 cpu-$(CONFIG_BF524) := bf524 Loading arch/blackfin/configs/BF518F-EZBRD_defconfig 0 → 100644 +1130 −0 File added.Preview size limit exceeded, changes collapsed. Show changes arch/blackfin/include/asm/gpio.h +51 −0 Original line number Diff line number Diff line Loading @@ -143,6 +143,57 @@ #define PERIPHERAL_USAGE 1 #define GPIO_USAGE 0 #if defined(BF518_FAMILY) #define MAX_BLACKFIN_GPIOS 40 #define GPIO_PF0 0 #define GPIO_PF1 1 #define GPIO_PF2 2 #define GPIO_PF3 3 #define GPIO_PF4 4 #define GPIO_PF5 5 #define GPIO_PF6 6 #define GPIO_PF7 7 #define GPIO_PF8 8 #define GPIO_PF9 9 #define GPIO_PF10 10 #define GPIO_PF11 11 #define GPIO_PF12 12 #define GPIO_PF13 13 #define GPIO_PF14 14 #define GPIO_PF15 15 #define GPIO_PG0 16 #define GPIO_PG1 17 #define GPIO_PG2 18 #define GPIO_PG3 19 #define GPIO_PG4 20 #define GPIO_PG5 21 #define GPIO_PG6 22 #define GPIO_PG7 23 #define GPIO_PG8 24 #define GPIO_PG9 25 #define GPIO_PG10 26 #define GPIO_PG11 27 #define GPIO_PG12 28 #define GPIO_PG13 29 #define GPIO_PG14 30 #define GPIO_PG15 31 #define GPIO_PH0 32 #define GPIO_PH1 33 #define GPIO_PH2 34 #define GPIO_PH3 35 #define GPIO_PH4 36 #define GPIO_PH5 37 #define GPIO_PH6 38 #define GPIO_PH7 39 #define PORT_F GPIO_PF0 #define PORT_G GPIO_PG0 #define PORT_H GPIO_PH0 #endif #ifdef BF533_FAMILY #define MAX_BLACKFIN_GPIOS 16 Loading arch/blackfin/kernel/bfin_gpio.c +11 −11 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { }; #endif #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { (struct gpio_port_t *) PORTFIO, (struct gpio_port_t *) PORTGIO, Loading @@ -139,7 +139,7 @@ static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = { }; #endif #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF518_FAMILY) static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = { (unsigned short *) PORTF_MUX, (unsigned short *) PORTG_MUX, Loading Loading @@ -206,7 +206,7 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB}; #endif #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF518_FAMILY) static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB}; #endif Loading Loading @@ -268,7 +268,7 @@ static int cmp_label(unsigned short ident, const char *label) return -EINVAL; } #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) static void port_setup(unsigned gpio, unsigned short usage) { if (!check_gpio(gpio)) { Loading Loading @@ -383,7 +383,7 @@ inline u16 get_portmux(unsigned short portno) return (pmux >> (2 * gpio_sub_n(portno)) & 0x3); } #elif defined(BF527_FAMILY) #elif defined(BF527_FAMILY) || defined(BF518_FAMILY) inline void portmux_setup(unsigned short portno, unsigned short function) { u16 pmux, ident = P_IDENT(portno); Loading Loading @@ -683,7 +683,7 @@ u32 bfin_pm_standby_setup(void) gpio_bankb[bank]->maskb = 0; if (mask) { #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) gpio_bank_saved[bank].fer = *port_fer[bank]; #endif gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen; Loading Loading @@ -728,7 +728,7 @@ void bfin_pm_standby_restore(void) bank = gpio_bank(i); if (mask) { #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) *port_fer[bank] = gpio_bank_saved[bank].fer; #endif gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen; Loading @@ -754,9 +754,9 @@ void bfin_gpio_pm_hibernate_suspend(void) for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { bank = gpio_bank(i); #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) gpio_bank_saved[bank].fer = *port_fer[bank]; #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF518_FAMILY) gpio_bank_saved[bank].mux = *port_mux[bank]; #else if (bank == 0) Loading @@ -782,8 +782,8 @@ void bfin_gpio_pm_hibernate_restore(void) for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { bank = gpio_bank(i); #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) #if defined(BF527_FAMILY) || defined(BF518_FAMILY) *port_mux[bank] = gpio_bank_saved[bank].mux; #else if (bank == 0) Loading Loading
arch/blackfin/Kconfig +39 −9 Original line number Diff line number Diff line Loading @@ -77,6 +77,26 @@ choice prompt "CPU" default BF533 config BF512 bool "BF512" help BF512 Processor Support. config BF514 bool "BF514" help BF514 Processor Support. config BF516 bool "BF516" help BF516 Processor Support. config BF518 bool "BF518" help BF518 Processor Support. config BF522 bool "BF522" help Loading Loading @@ -181,27 +201,27 @@ endchoice config BF_REV_MIN int default 0 if (BF52x || BF54x) default 0 if (BF51x || BF52x || BF54x) default 2 if (BF537 || BF536 || BF534) default 3 if (BF561 ||BF533 || BF532 || BF531) default 4 if (BF538 || BF539) config BF_REV_MAX int default 2 if (BF52x || BF54x) default 2 if (BF51x || BF52x || BF54x) default 3 if (BF537 || BF536 || BF534) default 5 if (BF561 || BF538 || BF539) default 6 if (BF533 || BF532 || BF531) choice prompt "Silicon Rev" default BF_REV_0_1 if (BF52x || BF54x) default BF_REV_0_1 if (BF51x || BF52x || BF54x) default BF_REV_0_2 if (BF534 || BF536 || BF537) default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF561) config BF_REV_0_0 bool "0.0" depends on (BF52x || BF54x) depends on (BF51x || BF52x || BF54x) config BF_REV_0_1 bool "0.1" Loading Loading @@ -235,6 +255,11 @@ config BF_REV_NONE endchoice config BF51x bool depends on (BF512 || BF514 || BF516 || BF518) default y config BF52x bool depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527) Loading Loading @@ -282,6 +307,7 @@ config MEM_MT48LC32M16A2TG_75 depends on (BFIN527_EZKIT || BFIN532_IP0X || BLACKSTAMP || BFIN526_EZBRD) default y source "arch/blackfin/mach-bf518/Kconfig" source "arch/blackfin/mach-bf527/Kconfig" source "arch/blackfin/mach-bf533/Kconfig" source "arch/blackfin/mach-bf561/Kconfig" Loading Loading @@ -330,7 +356,7 @@ config CLKIN_HZ int "Frequency of the crystal on the board in Hz" default "11059200" if BFIN533_STAMP default "27000000" if BFIN533_EZKIT default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN538_EZKIT) default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN538_EZKIT || BFIN518F-EZBRD) default "30000000" if BFIN561_EZKIT default "24576000" if PNAV10 default "10000000" if BFIN532_IP0X Loading Loading @@ -370,7 +396,7 @@ config VCO_MULT default "22" if BFIN533_BLUETECHNIX_CM default "20" if (BFIN537_BLUETECHNIX_CM || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM) default "20" if BFIN561_EZKIT default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD) default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN518F_EZBRD) help This controls the frequency of the on-chip PLL. This can be between 1 and 64. PLL Frequency = (Crystal Frequency) * (this setting) Loading Loading @@ -432,6 +458,10 @@ config MAX_MEM_SIZE # config MAX_VCO_HZ int default 400000000 if BF512 default 400000000 if BF514 default 400000000 if BF516 default 400000000 if BF518 default 600000000 if BF522 default 400000000 if BF523 default 400000000 if BF524 Loading Loading @@ -1025,7 +1055,7 @@ comment "Possible Suspend Mem / Hibernate Wake-Up Sources" config PM_BFIN_WAKE_PH6 bool "Allow Wake-Up from on-chip PHY or PH6 GP" depends on PM && (BF52x || BF534 || BF536 || BF537) depends on PM && (BF51x || BF52x || BF534 || BF536 || BF537) default n help Enable PHY and PH6 GP Wake-Up (Voltage Regulator Power-Up) Loading
arch/blackfin/Makefile +8 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,10 @@ KALLSYMS += --symbol-prefix=_ KBUILD_DEFCONFIG := BF537-STAMP_defconfig # setup the machine name and the machine dependent settings machine-$(CONFIG_BF512) := bf518 machine-$(CONFIG_BF514) := bf518 machine-$(CONFIG_BF516) := bf518 machine-$(CONFIG_BF518) := bf518 machine-$(CONFIG_BF522) := bf527 machine-$(CONFIG_BF523) := bf527 machine-$(CONFIG_BF524) := bf527 Loading @@ -44,6 +48,10 @@ machine-$(CONFIG_BF561) := bf561 MACHINE := $(machine-y) export MACHINE cpu-$(CONFIG_BF512) := bf512 cpu-$(CONFIG_BF514) := bf514 cpu-$(CONFIG_BF516) := bf516 cpu-$(CONFIG_BF518) := bf518 cpu-$(CONFIG_BF522) := bf522 cpu-$(CONFIG_BF523) := bf523 cpu-$(CONFIG_BF524) := bf524 Loading
arch/blackfin/configs/BF518F-EZBRD_defconfig 0 → 100644 +1130 −0 File added.Preview size limit exceeded, changes collapsed. Show changes
arch/blackfin/include/asm/gpio.h +51 −0 Original line number Diff line number Diff line Loading @@ -143,6 +143,57 @@ #define PERIPHERAL_USAGE 1 #define GPIO_USAGE 0 #if defined(BF518_FAMILY) #define MAX_BLACKFIN_GPIOS 40 #define GPIO_PF0 0 #define GPIO_PF1 1 #define GPIO_PF2 2 #define GPIO_PF3 3 #define GPIO_PF4 4 #define GPIO_PF5 5 #define GPIO_PF6 6 #define GPIO_PF7 7 #define GPIO_PF8 8 #define GPIO_PF9 9 #define GPIO_PF10 10 #define GPIO_PF11 11 #define GPIO_PF12 12 #define GPIO_PF13 13 #define GPIO_PF14 14 #define GPIO_PF15 15 #define GPIO_PG0 16 #define GPIO_PG1 17 #define GPIO_PG2 18 #define GPIO_PG3 19 #define GPIO_PG4 20 #define GPIO_PG5 21 #define GPIO_PG6 22 #define GPIO_PG7 23 #define GPIO_PG8 24 #define GPIO_PG9 25 #define GPIO_PG10 26 #define GPIO_PG11 27 #define GPIO_PG12 28 #define GPIO_PG13 29 #define GPIO_PG14 30 #define GPIO_PG15 31 #define GPIO_PH0 32 #define GPIO_PH1 33 #define GPIO_PH2 34 #define GPIO_PH3 35 #define GPIO_PH4 36 #define GPIO_PH5 37 #define GPIO_PH6 38 #define GPIO_PH7 39 #define PORT_F GPIO_PF0 #define PORT_G GPIO_PG0 #define PORT_H GPIO_PH0 #endif #ifdef BF533_FAMILY #define MAX_BLACKFIN_GPIOS 16 Loading
arch/blackfin/kernel/bfin_gpio.c +11 −11 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { }; #endif #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) static struct gpio_port_t *gpio_bankb[gpio_bank(MAX_BLACKFIN_GPIOS)] = { (struct gpio_port_t *) PORTFIO, (struct gpio_port_t *) PORTGIO, Loading @@ -139,7 +139,7 @@ static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = { }; #endif #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF518_FAMILY) static unsigned short *port_mux[gpio_bank(MAX_BLACKFIN_GPIOS)] = { (unsigned short *) PORTF_MUX, (unsigned short *) PORTG_MUX, Loading Loading @@ -206,7 +206,7 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG_INTB static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB}; #endif #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF518_FAMILY) static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB}; #endif Loading Loading @@ -268,7 +268,7 @@ static int cmp_label(unsigned short ident, const char *label) return -EINVAL; } #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) static void port_setup(unsigned gpio, unsigned short usage) { if (!check_gpio(gpio)) { Loading Loading @@ -383,7 +383,7 @@ inline u16 get_portmux(unsigned short portno) return (pmux >> (2 * gpio_sub_n(portno)) & 0x3); } #elif defined(BF527_FAMILY) #elif defined(BF527_FAMILY) || defined(BF518_FAMILY) inline void portmux_setup(unsigned short portno, unsigned short function) { u16 pmux, ident = P_IDENT(portno); Loading Loading @@ -683,7 +683,7 @@ u32 bfin_pm_standby_setup(void) gpio_bankb[bank]->maskb = 0; if (mask) { #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) gpio_bank_saved[bank].fer = *port_fer[bank]; #endif gpio_bank_saved[bank].inen = gpio_bankb[bank]->inen; Loading Loading @@ -728,7 +728,7 @@ void bfin_pm_standby_restore(void) bank = gpio_bank(i); if (mask) { #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) *port_fer[bank] = gpio_bank_saved[bank].fer; #endif gpio_bankb[bank]->inen = gpio_bank_saved[bank].inen; Loading @@ -754,9 +754,9 @@ void bfin_gpio_pm_hibernate_suspend(void) for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { bank = gpio_bank(i); #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) gpio_bank_saved[bank].fer = *port_fer[bank]; #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF518_FAMILY) gpio_bank_saved[bank].mux = *port_mux[bank]; #else if (bank == 0) Loading @@ -782,8 +782,8 @@ void bfin_gpio_pm_hibernate_restore(void) for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) { bank = gpio_bank(i); #if defined(BF527_FAMILY) || defined(BF537_FAMILY) #ifdef BF527_FAMILY #if defined(BF527_FAMILY) || defined(BF537_FAMILY) || defined(BF518_FAMILY) #if defined(BF527_FAMILY) || defined(BF518_FAMILY) *port_mux[bank] = gpio_bank_saved[bank].mux; #else if (bank == 0) Loading