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Commit 31035839 authored by Remi Pommarel's avatar Remi Pommarel Committed by Jerome Brunet
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clk: meson: axg: Remove MIPI enable clock gate 



On AXG platforms HHI_MIPI_CNTL0 is part of the MIPI/PCIe analog PHY
region and is not related to clock one and can be removed from it.

Signed-off-by: default avatarRemi Pommarel <repk@triplefau.lt>
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent dcd48b25
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