Commit 3138ba6e authored by Patrik Jakobsson's avatar Patrik Jakobsson
Browse files

drm/gma500: Remove unused declarations and other cruft 



Most of these are old leftovers from one of the driver merges. This is
all dead code.

Signed-off-by: default avatarPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Acked-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20220317092555.17882-1-patrik.r.jakobsson@gmail.com
parent 044feb97

drivers/gpu/drm/gma500/psb_drv.h

+1 −74
Original line number Diff line number Diff line
@@ -36,12 +36,6 @@ 
/* Append new drm mode definition here, align with libdrm definition */

#define DRM_MODE_SCALE_NO_SCALE   	2



enum {

	CHIP_PSB_8108 = 0,		/* Poulsbo */

	CHIP_PSB_8109 = 1,		/* Poulsbo */

	CHIP_MRST_4100 = 2,		/* Moorestown/Oaktrail */

};



#define IS_PSB(drm) ((to_pci_dev((drm)->dev)->device & 0xfffe) == 0x8108)

#define IS_MRST(drm) ((to_pci_dev((drm)->dev)->device & 0xfff0) == 0x4100)

#define IS_CDV(drm) ((to_pci_dev((drm)->dev)->device & 0xfff0) == 0x0be0)
@@ -617,15 +611,7 @@ struct psb_ops { 
	int i2c_bus;		/* I2C bus identifier for Moorestown */

};







extern int drm_crtc_probe_output_modes(struct drm_device *dev, int, int);

extern int drm_pick_crtcs(struct drm_device *dev);



/* psb_irq.c */

extern void psb_irq_uninstall_islands(struct drm_device *dev, int hw_islands);

extern int psb_vblank_wait2(struct drm_device *dev, unsigned int *sequence);

extern int psb_vblank_wait(struct drm_device *dev, unsigned int *sequence);

extern int psb_enable_vblank(struct drm_crtc *crtc);

extern void psb_disable_vblank(struct drm_crtc *crtc);

void
@@ -636,17 +622,9 @@ psb_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask); 


extern u32 psb_get_vblank_counter(struct drm_crtc *crtc);



/* framebuffer.c */

extern int psbfb_probed(struct drm_device *dev);

extern int psbfb_remove(struct drm_device *dev,

			struct drm_framebuffer *fb);

/* psb_drv.c */

extern void psb_spank(struct drm_psb_private *dev_priv);



/* psb_reset.c */

/* psb_lid.c */

extern void psb_lid_timer_init(struct drm_psb_private *dev_priv);

extern void psb_lid_timer_takedown(struct drm_psb_private *dev_priv);

extern void psb_print_pagefault(struct drm_psb_private *dev_priv);



/* modesetting */

extern void psb_modeset_init(struct drm_device *dev);
@@ -689,43 +667,7 @@ extern const struct psb_ops oaktrail_chip_ops; 
/* cdv_device.c */

extern const struct psb_ops cdv_chip_ops;



/* Debug print bits setting */

#define PSB_D_GENERAL (1 << 0)

#define PSB_D_INIT    (1 << 1)

#define PSB_D_IRQ     (1 << 2)

#define PSB_D_ENTRY   (1 << 3)

/* debug the get H/V BP/FP count */

#define PSB_D_HV      (1 << 4)

#define PSB_D_DBI_BF  (1 << 5)

#define PSB_D_PM      (1 << 6)

#define PSB_D_RENDER  (1 << 7)

#define PSB_D_REG     (1 << 8)

#define PSB_D_MSVDX   (1 << 9)

#define PSB_D_TOPAZ   (1 << 10)



extern int drm_idle_check_interval;



/* Utilities */

static inline u32 MRST_MSG_READ32(int domain, uint port, uint offset)

{

	int mcr = (0xD0<<24) | (port << 16) | (offset << 8);

	uint32_t ret_val = 0;

	struct pci_dev *pci_root = pci_get_domain_bus_and_slot(domain, 0, 0);

	pci_write_config_dword(pci_root, 0xD0, mcr);

	pci_read_config_dword(pci_root, 0xD4, &ret_val);

	pci_dev_put(pci_root);

	return ret_val;

}

static inline void MRST_MSG_WRITE32(int domain, uint port, uint offset,

				    u32 value)

{

	int mcr = (0xE0<<24) | (port << 16) | (offset << 8) | 0xF0;

	struct pci_dev *pci_root = pci_get_domain_bus_and_slot(domain, 0, 0);

	pci_write_config_dword(pci_root, 0xD4, value);

	pci_write_config_dword(pci_root, 0xD0, mcr);

	pci_dev_put(pci_root);

}



static inline uint32_t REGISTER_READ(struct drm_device *dev, uint32_t reg)

{

	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
@@ -806,24 +748,9 @@ static inline void REGISTER_WRITE8(struct drm_device *dev, 
#define PSB_WVDC32(_val, _offs)		iowrite32(_val, dev_priv->vdc_reg + (_offs))

#define PSB_RVDC32(_offs)		ioread32(dev_priv->vdc_reg + (_offs))



/* #define TRAP_SGX_PM_FAULT 1 */

#ifdef TRAP_SGX_PM_FAULT

#define PSB_RSGX32(_offs)						\

({									\

	if (inl(dev_priv->apm_base + PSB_APM_STS) & 0x3) {		\

		pr_err("access sgx when it's off!! (READ) %s, %d\n",	\

		       __FILE__, __LINE__);				\

		melay(1000);						\

	}								\

	ioread32(dev_priv->sgx_reg + (_offs));				\

})

#else

#define PSB_RSGX32(_offs)		ioread32(dev_priv->sgx_reg + (_offs))

#endif

#define PSB_WSGX32(_val, _offs)		iowrite32(_val, dev_priv->sgx_reg + (_offs))



#define MSVDX_REG_DUMP 0



#define PSB_WMSVDX32(_val, _offs)	iowrite32(_val, dev_priv->msvdx_reg + (_offs))

#define PSB_RMSVDX32(_offs)		ioread32(dev_priv->msvdx_reg + (_offs))