Commit 342475ac authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
Browse files

rtw89: 8852c: add TX power by rate and limit tables 



TX power depends on rate, but must follow regulation for specific country.
Once asked to set channel, we configure registers according to these TX
power tables.

Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220414062027.62638-3-pkshih@realtek.com
parent eefad995

drivers/net/wireless/realtek/rtw89/core.h

+1 −0
Original line number Diff line number Diff line
@@ -401,6 +401,7 @@ enum rtw89_rate_section { 
	RTW89_RS_OFFSET,

	RTW89_RS_MAX,

	RTW89_RS_LMT_NUM = RTW89_RS_MCS + 1,

	RTW89_RS_TX_SHAPE_NUM = RTW89_RS_OFDM + 1,

};



enum rtw89_rate_max {

drivers/net/wireless/realtek/rtw89/rtw8852c.c

+9 −0
Original line number Diff line number Diff line
@@ -664,6 +664,15 @@ const struct rtw89_chip_info rtw8852c_chip_info = { 
	.rf_table		= {&rtw89_8852c_phy_radiob_table,

				   &rtw89_8852c_phy_radioa_table,},

	.nctl_table		= &rtw89_8852c_phy_nctl_table,

	.byr_table		= &rtw89_8852c_byr_table,

	.txpwr_lmt_2g		= &rtw89_8852c_txpwr_lmt_2g,

	.txpwr_lmt_5g		= &rtw89_8852c_txpwr_lmt_5g,

	.txpwr_lmt_6g		= &rtw89_8852c_txpwr_lmt_6g,

	.txpwr_lmt_ru_2g	= &rtw89_8852c_txpwr_lmt_ru_2g,

	.txpwr_lmt_ru_5g	= &rtw89_8852c_txpwr_lmt_ru_5g,

	.txpwr_lmt_ru_6g	= &rtw89_8852c_txpwr_lmt_ru_6g,

	.txpwr_factor_rf	= 2,

	.txpwr_factor_mac	= 1,

	.dig_table		= NULL,

	.hw_sec_hdr		= true,

	.sec_ctrl_efuse_size	= 4,

drivers/net/wireless/realtek/rtw89/rtw8852c_table.c

+5627 −0

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/wireless/realtek/rtw89/rtw8852c_table.h

+18 −0
Original line number Diff line number Diff line
@@ -12,5 +12,23 @@ extern const struct rtw89_phy_table rtw89_8852c_phy_bb_gain_table; 
extern const struct rtw89_phy_table rtw89_8852c_phy_radioa_table;

extern const struct rtw89_phy_table rtw89_8852c_phy_radiob_table;

extern const struct rtw89_phy_table rtw89_8852c_phy_nctl_table;

extern const struct rtw89_txpwr_table rtw89_8852c_byr_table;

extern const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM]

				    [RTW89_REGD_NUM];

extern const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]

					[RTW89_RS_LMT_NUM][RTW89_BF_NUM]

					[RTW89_REGD_NUM][RTW89_2G_CH_NUM];

extern const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]

					[RTW89_RS_LMT_NUM][RTW89_BF_NUM]

					[RTW89_REGD_NUM][RTW89_5G_CH_NUM];

extern const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM]

					[RTW89_RS_LMT_NUM][RTW89_BF_NUM]

					[RTW89_REGD_NUM][RTW89_6G_CH_NUM];

extern const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]

					   [RTW89_REGD_NUM][RTW89_2G_CH_NUM];

extern const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]

					   [RTW89_REGD_NUM][RTW89_5G_CH_NUM];

extern const s8 rtw89_8852c_txpwr_lmt_ru_6g[RTW89_RU_NUM][RTW89_NTX_NUM]

					   [RTW89_REGD_NUM][RTW89_6G_CH_NUM];



#endif