Unverified Commit 35ee6a4d authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'ux500-dts-for-v6.5' of... 

Merge tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt

These are some Ux500 DTS updates for the v6.5 kernel cycle:
- Define the SRAM nodes that will be the preferred way to
  specify SRAM segments to drivers going forward.
- Fix up the naming of the STMPE nodes as we are merging
  proper YAML bindings which puts restrictions on those.
- Disable charging on the Ux500 HREF boards because these
  do not have any real batteries connected.

* tag 'ux500-dts-for-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ux500: Add eSRAM nodes
  ARM: dts: ux500: Fix STMPE device nodes
  ARM: dts: ux500: Disable charging on HREF boards

Link: https://lore.kernel.org/r/CACRpkdZ2YLzB-n+1M9u0UqVfct_LAR5cLvYyJhxHsXNR_TFzpQ@mail.gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents c98d5898 56f0440f

arch/arm/boot/dts/ste-dbx5x0.dtsi

+71 −2
Original line number Diff line number Diff line
@@ -110,6 +110,74 @@ soc { 
		interrupt-parent = <&intc>;

		ranges;



		/*

		 * 640KB ESRAM (embedded static random access memory), divided

		 * into 5 banks of 128 KB each. This is a fast memory usually

		 * used by different accelerators. We group these according to

		 * their power domains: ESRAM0 (always on) ESRAM 1+2 and

		 * ESRAM 3+4.

		 */

		sram@40000000 {

			/* The first (always on) ESRAM 0, 128 KB */

			compatible = "mmio-sram";

			reg = <0x40000000 0x20000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x40000000 0x20000>;



			sram@0 {

				compatible = "stericsson,u8500-esram";

				reg = <0x0 0x10000>;

				pool;

			};

			lcpa: sram@10000 {

				/*

				 * This eSRAM is used by the DMA40 DMA controller

				 * for Logical Channel Paramers (LCP), the address

				 * where these parameters are stored is called "LCPA".

				 * This is addressed directly by the driver so no

				 * pool is used.

				 */

				compatible = "stericsson,u8500-esram";

				label = "DMA40-LCPA";

				reg = <0x10000 0x800>;

			};

			sram@10800 {

				compatible = "stericsson,u8500-esram";

				reg = <0x10800 0xf800>;

				pool;

			};

		};

		sram@40020000 {

			/* ESRAM 1+2, 256 KB */

			compatible = "mmio-sram";

			reg = <0x40020000 0x40000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x40020000 0x40000>;

		};

		sram@40060000 {

			/* ESRAM 3+4, 256 KB */

			compatible = "mmio-sram";

			reg = <0x40060000 0x40000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x40060000 0x40000>;



			lcla: sram@20000 {

				/*

				 * This eSRAM is used by the DMA40 DMA controller

				 * for Logical Channel Logical Addresses (LCLA), the address

				 * where these parameters are stored is called "LCLA".

				 * This is addressed directly by the driver so no

				 * pool is used.

				 */

				compatible = "stericsson,u8500-esram";

				label = "DMA40-LCLA";

				reg = <0x20000 0x2000>;

			};

		};



		ptm@801ae000 {

			compatible = "arm,coresight-etm3x", "arm,primecell";

			reg = <0x801ae000 0x1000>;
@@ -536,9 +604,10 @@ usb_per5@a03e0000 { 


		dma: dma-controller@801C0000 {

			compatible = "stericsson,db8500-dma40", "stericsson,dma40";

			reg = <0x801C0000 0x1000 0x40010000 0x800>;

			reg-names = "base", "lcpa";

			reg = <0x801C0000 0x1000>;

			reg-names = "base";

			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

			sram = <&lcpa>, <&lcla>;



			#dma-cells = <3>;

			memcpy-channels = <56 57 58 59 60>;

arch/arm/boot/dts/ste-href-ab8500.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -418,6 +418,24 @@ default_cfg { 
						};

					};

				};

				/*

				 * Charging is not working on the HREF unless an actual battery is

				 * mounted, most HREFs have a DC cable in to the "battery power"

				 * which means this will only be cofusing. So do not enable charging

				 * of the HREFs.

				 */

				ab8500_fg {

					status = "disabled";

				};

				ab8500_btemp {

					status = "disabled";

				};

				ab8500_charger {

					status = "disabled";

				};

				ab8500_chargalg {

					status = "disabled";

				};

			};

		};

	};

arch/arm/boot/dts/ste-href-stuib.dtsi

+2 −3
Original line number Diff line number Diff line
@@ -30,12 +30,11 @@ button@145 { 


	soc {

		i2c@80004000 {

			stmpe1601: stmpe1601@40 {

			stmpe1601: port-expander@40 {

				compatible = "st,stmpe1601";

				reg = <0x40>;

				interrupts = <26 IRQ_TYPE_EDGE_FALLING>;

				interrupt-parent = <&gpio6>;

				interrupt-controller;

				vcc-supply = <&db8500_vsmps2_reg>;

				vio-supply = <&db8500_vsmps2_reg>;

				pinctrl-names = "default";
@@ -44,7 +43,7 @@ stmpe1601: stmpe1601@40 { 
				wakeup-source;

				st,autosleep-timeout = <1024>;



				stmpe_keypad {

				keyboard-controller {

					compatible = "st,stmpe-keypad";



					debounce-interval = <64>;

arch/arm/boot/dts/ste-nomadik-nhk15.dts

+7 −9
Original line number Diff line number Diff line
@@ -99,17 +99,16 @@ lis3lv02dl@1d { 
			pinctrl-names = "default";

			reg = <0x1d>;

		};

		stmpe0: stmpe2401@43 {

		stmpe0: port-expander@43 {

			compatible = "st,stmpe2401";

			reg = <0x43>;

			reset-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; // GPIO77

			interrupts = <12 IRQ_TYPE_EDGE_FALLING>; // GPIO76

			interrupt-parent = <&gpio2>;

			interrupt-controller;

			wakeup-source;

			pinctrl-names = "default";

			pinctrl-0 = <&stmpe2401_1_nhk_mode>;

			stmpe_gpio43: stmpe_gpio {

			stmpe_gpio43: gpio {

				compatible = "st,stmpe-gpio";

				gpio-controller;

				#gpio-cells = <2>;
@@ -118,7 +117,7 @@ stmpe_gpio43: stmpe_gpio { 
				/* Some pins in alternate functions */

				st,norequest-mask = <0xf0f002>;

			};

			stmpe_keypad {

			keyboard-controller {

				compatible = "st,stmpe-keypad";

				debounce-interval = <64>;

				st,scan-count = <8>;
@@ -140,22 +139,21 @@ stmpe_keypad { 
						0x03020067 // Up

						0x0303006c>; // Down

			};

			stmpe0_pwm: stmpe_pwm {

			stmpe0_pwm: pwm {

				compatible = "st,stmpe-pwm";

				#pwm-cells = <2>;

			};

		};

		stmpe1: stmpe2401@44 {

		stmpe1: port-expander@44 {

			compatible = "st,stmpe2401";

			reg = <0x44>;

			reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; // GPIO79

			interrupts = <14 IRQ_TYPE_EDGE_FALLING>; // GPIO78

			interrupt-parent = <&gpio2>;

			interrupt-controller;

			wakeup-source;

			pinctrl-names = "default";

			pinctrl-0 = <&stmpe2401_2_nhk_mode>;

			stmpe_gpio44: stmpe_gpio {

			stmpe_gpio44: gpio {

				compatible = "st,stmpe-gpio";

				gpio-controller;

				#gpio-cells = <2>;
@@ -165,7 +163,7 @@ stmpe_gpio44: stmpe_gpio { 
				 * This will turn off SATA so that MMC/SD

				 * can thrive

				 */

				mmcsd-gpio {

				mmcsd-hog {

					gpio-hog;

					gpios = <2 0x0>;

					output-low;